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This patch adds a new property: isRegSequence and the related target hooks: TargetIntrInfo::getRegSequenceInputs and TargetInstrInfo::getRegSequenceLikeInputs to specify that a target specific instruction is a (kind of) REG_SEQUENCE. <rdar://problem/12702965> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215394 91177308-0d34-0410-b5e6-96231b3b80d8 |
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.. | ||
CostTable.h | ||
Target.td | ||
TargetCallingConv.h | ||
TargetCallingConv.td | ||
TargetFrameLowering.h | ||
TargetInstrInfo.h | ||
TargetIntrinsicInfo.h | ||
TargetItinerary.td | ||
TargetJITInfo.h | ||
TargetLibraryInfo.h | ||
TargetLowering.h | ||
TargetLoweringObjectFile.h | ||
TargetMachine.h | ||
TargetOpcodes.h | ||
TargetOptions.h | ||
TargetRegisterInfo.h | ||
TargetSchedule.td | ||
TargetSelectionDAG.td | ||
TargetSelectionDAGInfo.h | ||
TargetSubtargetInfo.h |