llvm-6502/test/CodeGen
Juergen Ributzka 298d1a6b21 [DAG] Teach DAG to also reassociate vector operations
This commit teaches DAG to reassociate vector ops, which in turn enables
constant folding of vector op chains that appear later on during custom lowering
and DAG combine.

Reviewed by Andrea Di Biagio

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199135 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-13 20:51:35 +00:00
..
AArch64 [AArch64] Fix assertion failure caused by an invalid comparison between APInt values. 2014-01-13 16:51:00 +00:00
ARM ARM: add test for r199108. Oops. 2014-01-13 14:20:25 +00:00
CPP Begin adding docs and IR-level support for the inalloca attribute 2013-12-19 02:14:12 +00:00
Generic Remove a failing test to get the buildbots back to green. 2014-01-06 00:43:09 +00:00
Hexagon
Inputs
Mips Fix broken CHECK lines. 2014-01-11 21:06:00 +00:00
MSP430
NVPTX Fix non-deterministic SDNodeOrder-dependent codegen 2014-01-12 14:09:17 +00:00
PowerPC Implement initial-exec TLS for PPC32. 2013-12-20 18:08:54 +00:00
R600 Fix broken CHECK lines. 2014-01-11 21:06:00 +00:00
SPARC Handle bundled terminators in isBlockOnlyReachableByFallthrough. 2014-01-12 19:24:08 +00:00
SystemZ [SystemZ] Flesh out stackrestore test (frame-11.ll) 2014-01-13 15:44:44 +00:00
Thumb Fix broken CHECK lines. 2014-01-11 21:06:00 +00:00
Thumb2 Fix PR 18369: [Thumbv8] asserts due to inconsistent CPSR liveness of IT blocks 2014-01-13 18:47:54 +00:00
X86 [DAG] Teach DAG to also reassociate vector operations 2014-01-13 20:51:35 +00:00
XCore Fix broken CHECK lines. 2014-01-11 21:06:00 +00:00