Matt Arsenault 29ae5b8a8c R600/SI: Use unordered equal instructions ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224067 91177308-0d34-0410-b5e6-96231b3b80d8		2014-12-11 22:15:43 +00:00
..
AArch64	[AArch64] MachO large code-model: Materialize FP constants in code.	2014-12-10 19:43:32 +00:00
ARM	ARM: correctly expand LDR-lit based globals.	2014-12-10 23:40:50 +00:00
CPP
Generic	Revert "Revert "DI: Fold constant arguments into a single MDString""	2014-10-03 20:01:09 +00:00
Hexagon	Handle ctor/init_array initialization.	2014-11-03 14:56:05 +00:00
Inputs	Revert "Revert "DI: Fold constant arguments into a single MDString""	2014-10-03 20:01:09 +00:00
Mips	[mips][microMIPS] Implement CodeGen support for LI16 instruction.	2014-12-11 13:56:23 +00:00
MSP430
NVPTX	IR: Canonicalize metadata formatting, NFC	2014-12-11 06:32:29 +00:00
PowerPC	[PowerPC] Implement BuildSDIVPow2, lower i64 pow2 sdiv using sradi	2014-12-11 18:37:52 +00:00
R600	R600/SI: Use unordered equal instructions	2014-12-11 22:15:43 +00:00
SPARC
SystemZ
Thumb	Re-add support to llvm-objdump for Mach-O universal files and archives with -macho	2014-12-04 23:56:27 +00:00
Thumb2	ARM: allow constpool entry to be moved to the user's block in all cases.	2014-11-13 17:58:53 +00:00
X86	[AVX512] Add support for 512b variable bit shift intrinsics.	2014-12-11 17:13:05 +00:00
XCore	Fix a bit of confusion about .set and produce more readable assembly.	2014-10-21 01:17:30 +00:00