Arnold Schwaighofer 4b5324ad2c This patch corrects the handling of byval arguments for tailcall ... optimized x86-64 (and x86) calls so that they work (... at least for my test cases). Should fix the following problems: Problem 1: When i introduced the optimized handling of arguments for tail called functions (using a sequence of copyto/copyfrom virtual registers instead of always lowering to top of the stack) i did not handle byval arguments correctly e.g they did not work at all :). Problem 2: On x86-64 after the arguments of the tail called function are moved to their registers (which include ESI/RSI etc), tail call optimization performs byval lowering which causes xSI,xDI, xCX registers to be overwritten. This is handled in this patch by moving the arguments to virtual registers first and after the byval lowering the arguments are moved from those virtual registers back to RSI/RDI/RCX. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49584 91177308-0d34-0410-b5e6-96231b3b80d8		2008-04-12 18:11:06 +00:00
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Alpha
ARM	If a PHI node has a single implicit_def source, replace it with an implicit_def instead of a copy.	2008-04-11 17:54:45 +00:00
CBackend
CellSPU	Add more patterns to match in the integer comparison test harnesses.	2008-03-20 00:51:36 +00:00
Generic
IA64
PowerPC	A copy instruction may use a register multiple times on some targets. Change them all.	2008-04-10 18:38:47 +00:00
SPARC
X86	This patch corrects the handling of byval arguments for tailcall	2008-04-12 18:11:06 +00:00