mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-14 11:32:34 +00:00
b89304eb7c
The SLP vectorizer should propagate IR-level optimization hints/flags (nsw, nuw, exact, fast-math) when converting scalar instructions into vectors. But this isn't a simple copy - we need to take the intersection (the logical 'and') of the sets of flags on the scalars. The solution is further complicated because we can have non-uniform (non-SIMD) vector ops after: http://reviews.llvm.org/D4015 http://llvm.org/viewvc/llvm-project?view=revision&revision=211339 The vast majority of changed files are existing tests that were not propagating IR flags, but I've also added a new test file for focused testing of IR flag possibilities. Differential Revision: http://reviews.llvm.org/D5172 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217051 91177308-0d34-0410-b5e6-96231b3b80d8
351 lines
9.8 KiB
LLVM
351 lines
9.8 KiB
LLVM
; RUN: opt < %s -basicaa -slp-vectorizer -S | FileCheck %s
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; Check propagation of optional IR flags (PR20802). For a flag to
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; propagate from scalar instructions to their vector replacement,
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; *all* scalar instructions must have the flag.
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target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-unknown"
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; CHECK-LABEL: @exact(
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; CHECK: lshr exact <4 x i32>
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define void @exact(i32* %x) {
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%idx1 = getelementptr inbounds i32* %x, i64 0
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%idx2 = getelementptr inbounds i32* %x, i64 1
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%idx3 = getelementptr inbounds i32* %x, i64 2
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%idx4 = getelementptr inbounds i32* %x, i64 3
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%load1 = load i32* %idx1, align 4
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%load2 = load i32* %idx2, align 4
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%load3 = load i32* %idx3, align 4
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%load4 = load i32* %idx4, align 4
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%op1 = lshr exact i32 %load1, 1
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%op2 = lshr exact i32 %load2, 1
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%op3 = lshr exact i32 %load3, 1
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%op4 = lshr exact i32 %load4, 1
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store i32 %op1, i32* %idx1, align 4
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store i32 %op2, i32* %idx2, align 4
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store i32 %op3, i32* %idx3, align 4
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store i32 %op4, i32* %idx4, align 4
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ret void
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}
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; CHECK-LABEL: @not_exact(
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; CHECK: lshr <4 x i32>
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define void @not_exact(i32* %x) {
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%idx1 = getelementptr inbounds i32* %x, i64 0
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%idx2 = getelementptr inbounds i32* %x, i64 1
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%idx3 = getelementptr inbounds i32* %x, i64 2
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%idx4 = getelementptr inbounds i32* %x, i64 3
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%load1 = load i32* %idx1, align 4
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%load2 = load i32* %idx2, align 4
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%load3 = load i32* %idx3, align 4
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%load4 = load i32* %idx4, align 4
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%op1 = lshr exact i32 %load1, 1
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%op2 = lshr i32 %load2, 1
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%op3 = lshr exact i32 %load3, 1
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%op4 = lshr exact i32 %load4, 1
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store i32 %op1, i32* %idx1, align 4
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store i32 %op2, i32* %idx2, align 4
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store i32 %op3, i32* %idx3, align 4
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store i32 %op4, i32* %idx4, align 4
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ret void
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}
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; CHECK-LABEL: @nsw(
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; CHECK: add nsw <4 x i32>
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define void @nsw(i32* %x) {
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%idx1 = getelementptr inbounds i32* %x, i64 0
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%idx2 = getelementptr inbounds i32* %x, i64 1
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%idx3 = getelementptr inbounds i32* %x, i64 2
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%idx4 = getelementptr inbounds i32* %x, i64 3
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%load1 = load i32* %idx1, align 4
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%load2 = load i32* %idx2, align 4
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%load3 = load i32* %idx3, align 4
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%load4 = load i32* %idx4, align 4
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%op1 = add nsw i32 %load1, 1
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%op2 = add nsw i32 %load2, 1
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%op3 = add nsw i32 %load3, 1
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%op4 = add nsw i32 %load4, 1
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store i32 %op1, i32* %idx1, align 4
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store i32 %op2, i32* %idx2, align 4
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store i32 %op3, i32* %idx3, align 4
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store i32 %op4, i32* %idx4, align 4
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ret void
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}
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; CHECK-LABEL: @not_nsw(
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; CHECK: add <4 x i32>
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define void @not_nsw(i32* %x) {
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%idx1 = getelementptr inbounds i32* %x, i64 0
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%idx2 = getelementptr inbounds i32* %x, i64 1
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%idx3 = getelementptr inbounds i32* %x, i64 2
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%idx4 = getelementptr inbounds i32* %x, i64 3
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%load1 = load i32* %idx1, align 4
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%load2 = load i32* %idx2, align 4
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%load3 = load i32* %idx3, align 4
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%load4 = load i32* %idx4, align 4
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%op1 = add nsw i32 %load1, 1
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%op2 = add nsw i32 %load2, 1
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%op3 = add nsw i32 %load3, 1
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%op4 = add i32 %load4, 1
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store i32 %op1, i32* %idx1, align 4
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store i32 %op2, i32* %idx2, align 4
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store i32 %op3, i32* %idx3, align 4
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store i32 %op4, i32* %idx4, align 4
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ret void
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}
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; CHECK-LABEL: @nuw(
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; CHECK: add nuw <4 x i32>
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define void @nuw(i32* %x) {
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%idx1 = getelementptr inbounds i32* %x, i64 0
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%idx2 = getelementptr inbounds i32* %x, i64 1
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%idx3 = getelementptr inbounds i32* %x, i64 2
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%idx4 = getelementptr inbounds i32* %x, i64 3
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%load1 = load i32* %idx1, align 4
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%load2 = load i32* %idx2, align 4
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%load3 = load i32* %idx3, align 4
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%load4 = load i32* %idx4, align 4
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%op1 = add nuw i32 %load1, 1
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%op2 = add nuw i32 %load2, 1
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%op3 = add nuw i32 %load3, 1
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%op4 = add nuw i32 %load4, 1
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store i32 %op1, i32* %idx1, align 4
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store i32 %op2, i32* %idx2, align 4
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store i32 %op3, i32* %idx3, align 4
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store i32 %op4, i32* %idx4, align 4
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ret void
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}
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; CHECK-LABEL: @not_nuw(
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; CHECK: add <4 x i32>
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define void @not_nuw(i32* %x) {
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%idx1 = getelementptr inbounds i32* %x, i64 0
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%idx2 = getelementptr inbounds i32* %x, i64 1
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%idx3 = getelementptr inbounds i32* %x, i64 2
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%idx4 = getelementptr inbounds i32* %x, i64 3
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%load1 = load i32* %idx1, align 4
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%load2 = load i32* %idx2, align 4
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%load3 = load i32* %idx3, align 4
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%load4 = load i32* %idx4, align 4
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%op1 = add nuw i32 %load1, 1
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%op2 = add i32 %load2, 1
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%op3 = add i32 %load3, 1
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%op4 = add nuw i32 %load4, 1
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store i32 %op1, i32* %idx1, align 4
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store i32 %op2, i32* %idx2, align 4
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store i32 %op3, i32* %idx3, align 4
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store i32 %op4, i32* %idx4, align 4
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ret void
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}
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; CHECK-LABEL: @nnan(
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; CHECK: fadd nnan <4 x float>
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define void @nnan(float* %x) {
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%idx1 = getelementptr inbounds float* %x, i64 0
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%idx2 = getelementptr inbounds float* %x, i64 1
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%idx3 = getelementptr inbounds float* %x, i64 2
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%idx4 = getelementptr inbounds float* %x, i64 3
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%load1 = load float* %idx1, align 4
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%load2 = load float* %idx2, align 4
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%load3 = load float* %idx3, align 4
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%load4 = load float* %idx4, align 4
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%op1 = fadd fast nnan float %load1, 1.0
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%op2 = fadd nnan ninf float %load2, 1.0
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%op3 = fadd nsz nnan float %load3, 1.0
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%op4 = fadd arcp nnan float %load4, 1.0
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store float %op1, float* %idx1, align 4
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store float %op2, float* %idx2, align 4
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store float %op3, float* %idx3, align 4
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store float %op4, float* %idx4, align 4
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ret void
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}
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; CHECK-LABEL: @not_nnan(
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; CHECK: fadd <4 x float>
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define void @not_nnan(float* %x) {
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%idx1 = getelementptr inbounds float* %x, i64 0
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%idx2 = getelementptr inbounds float* %x, i64 1
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%idx3 = getelementptr inbounds float* %x, i64 2
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%idx4 = getelementptr inbounds float* %x, i64 3
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%load1 = load float* %idx1, align 4
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%load2 = load float* %idx2, align 4
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%load3 = load float* %idx3, align 4
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%load4 = load float* %idx4, align 4
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%op1 = fadd nnan float %load1, 1.0
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%op2 = fadd ninf float %load2, 1.0
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%op3 = fadd nsz float %load3, 1.0
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%op4 = fadd arcp float %load4, 1.0
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store float %op1, float* %idx1, align 4
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store float %op2, float* %idx2, align 4
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store float %op3, float* %idx3, align 4
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store float %op4, float* %idx4, align 4
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ret void
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}
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; CHECK-LABEL: @only_fast(
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; CHECK: fadd fast <4 x float>
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define void @only_fast(float* %x) {
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%idx1 = getelementptr inbounds float* %x, i64 0
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%idx2 = getelementptr inbounds float* %x, i64 1
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%idx3 = getelementptr inbounds float* %x, i64 2
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%idx4 = getelementptr inbounds float* %x, i64 3
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%load1 = load float* %idx1, align 4
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%load2 = load float* %idx2, align 4
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%load3 = load float* %idx3, align 4
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%load4 = load float* %idx4, align 4
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%op1 = fadd fast nnan float %load1, 1.0
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%op2 = fadd fast nnan ninf float %load2, 1.0
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%op3 = fadd fast nsz nnan float %load3, 1.0
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%op4 = fadd arcp nnan fast float %load4, 1.0
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store float %op1, float* %idx1, align 4
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store float %op2, float* %idx2, align 4
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store float %op3, float* %idx3, align 4
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store float %op4, float* %idx4, align 4
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ret void
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}
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; CHECK-LABEL: @only_arcp(
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; CHECK: fadd arcp <4 x float>
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define void @only_arcp(float* %x) {
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%idx1 = getelementptr inbounds float* %x, i64 0
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%idx2 = getelementptr inbounds float* %x, i64 1
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%idx3 = getelementptr inbounds float* %x, i64 2
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%idx4 = getelementptr inbounds float* %x, i64 3
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%load1 = load float* %idx1, align 4
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%load2 = load float* %idx2, align 4
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%load3 = load float* %idx3, align 4
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%load4 = load float* %idx4, align 4
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%op1 = fadd fast float %load1, 1.0
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%op2 = fadd fast float %load2, 1.0
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%op3 = fadd fast float %load3, 1.0
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%op4 = fadd arcp float %load4, 1.0
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store float %op1, float* %idx1, align 4
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store float %op2, float* %idx2, align 4
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store float %op3, float* %idx3, align 4
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store float %op4, float* %idx4, align 4
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ret void
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}
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; CHECK-LABEL: @addsub_all_nsw
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; CHECK: add nsw <4 x i32>
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; CHECK: sub nsw <4 x i32>
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define void @addsub_all_nsw(i32* %x) {
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%idx1 = getelementptr inbounds i32* %x, i64 0
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%idx2 = getelementptr inbounds i32* %x, i64 1
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%idx3 = getelementptr inbounds i32* %x, i64 2
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%idx4 = getelementptr inbounds i32* %x, i64 3
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%load1 = load i32* %idx1, align 4
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%load2 = load i32* %idx2, align 4
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%load3 = load i32* %idx3, align 4
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%load4 = load i32* %idx4, align 4
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%op1 = add nsw i32 %load1, 1
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%op2 = sub nsw i32 %load2, 1
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%op3 = add nsw i32 %load3, 1
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%op4 = sub nsw i32 %load4, 1
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store i32 %op1, i32* %idx1, align 4
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store i32 %op2, i32* %idx2, align 4
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store i32 %op3, i32* %idx3, align 4
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store i32 %op4, i32* %idx4, align 4
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ret void
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}
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; CHECK-LABEL: @addsub_some_nsw
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; CHECK: add nsw <4 x i32>
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; CHECK: sub <4 x i32>
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define void @addsub_some_nsw(i32* %x) {
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%idx1 = getelementptr inbounds i32* %x, i64 0
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%idx2 = getelementptr inbounds i32* %x, i64 1
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%idx3 = getelementptr inbounds i32* %x, i64 2
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%idx4 = getelementptr inbounds i32* %x, i64 3
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%load1 = load i32* %idx1, align 4
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%load2 = load i32* %idx2, align 4
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%load3 = load i32* %idx3, align 4
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%load4 = load i32* %idx4, align 4
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%op1 = add nsw i32 %load1, 1
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%op2 = sub nsw i32 %load2, 1
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%op3 = add nsw i32 %load3, 1
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%op4 = sub i32 %load4, 1
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store i32 %op1, i32* %idx1, align 4
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store i32 %op2, i32* %idx2, align 4
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store i32 %op3, i32* %idx3, align 4
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store i32 %op4, i32* %idx4, align 4
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ret void
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}
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; CHECK-LABEL: @addsub_no_nsw
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; CHECK: add <4 x i32>
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; CHECK: sub <4 x i32>
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define void @addsub_no_nsw(i32* %x) {
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%idx1 = getelementptr inbounds i32* %x, i64 0
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%idx2 = getelementptr inbounds i32* %x, i64 1
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%idx3 = getelementptr inbounds i32* %x, i64 2
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%idx4 = getelementptr inbounds i32* %x, i64 3
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%load1 = load i32* %idx1, align 4
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%load2 = load i32* %idx2, align 4
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%load3 = load i32* %idx3, align 4
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%load4 = load i32* %idx4, align 4
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%op1 = add i32 %load1, 1
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%op2 = sub nsw i32 %load2, 1
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%op3 = add nsw i32 %load3, 1
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%op4 = sub i32 %load4, 1
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store i32 %op1, i32* %idx1, align 4
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store i32 %op2, i32* %idx2, align 4
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store i32 %op3, i32* %idx3, align 4
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store i32 %op4, i32* %idx4, align 4
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ret void
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}
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