llvm-6502/test/CodeGen
Matt Arsenault 29f1788de9 R600: Fix selection failure on EXTLOAD
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194547 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-13 02:39:07 +00:00
..
AArch64 [AArch64] The shift right/left and insert immediate builtins expect 3 2013-11-11 19:11:11 +00:00
ARM [ARM] Add support for FP_HP_extension build attribute 2013-11-12 10:38:05 +00:00
CPP [tests] Cleanup initialization of test suffixes. 2013-08-16 00:37:11 +00:00
Generic Change objectsize intrinsic to accept different address spaces. 2013-10-07 18:06:48 +00:00
Hexagon TBAA: remove !tbaa from testing cases when they are not needed. 2013-09-30 18:17:35 +00:00
Inputs Debug Info: add an identifier field to DICompositeType. 2013-08-26 22:39:55 +00:00
Mips [mips] Fix a bug in function CC_MipsO32_FP64. The second double precision 2013-11-12 22:16:18 +00:00
MSP430 Make sure SP is always aligned on a 2 byte boundary 2013-10-24 09:32:31 +00:00
NVPTX [NVPTX] Properly handle bitcast ConstantExpr when checking for the alignment of function parameters 2013-11-11 19:28:19 +00:00
PowerPC Add PPC option for full register names in asm 2013-11-11 14:58:40 +00:00
R600 R600: Fix selection failure on EXTLOAD 2013-11-13 02:39:07 +00:00
SPARC [SparcV9] Handle i64 <-> float conversions in sparcv9 mode. 2013-11-03 12:28:40 +00:00
SystemZ [SystemZ] Automatically detect zEC12 and z196 hosts 2013-10-31 12:14:17 +00:00
Thumb 17309 ARM backend incorrectly lowers COPY_STRUCT_BYVAL_I32 for thumb1 targets 2013-10-17 19:52:05 +00:00
Thumb2 MachineSink: Fix and tweak critical-edge breaking heuristic. 2013-10-14 16:57:17 +00:00
X86 SelectionDAG: Teach the legalizer to split SETCC if VSELECT needs splitting too. 2013-11-13 01:57:54 +00:00
XCore XCore target: fix bug in aligning 'byval i8*' on the stack 2013-11-12 10:11:35 +00:00