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2a2cb2852632f2008acdd43a7a6501fc5c6b951c
llvm-6502/test/CodeGen
T
History
Richard Osborne 2a2cb28526 Add XCore intrinsic for settw instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126313 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-23 14:45:03 +00:00
..
Alpha
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ARM
More fcopysign correctness and performance fix.
2011-02-23 02:24:55 +00:00
Blackfin
…
CBackend
…
CellSPU
fix visitShift to properly zero extend the shift amount if the provided operand
2011-02-13 09:02:52 +00:00
CPP
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Generic
A fix for 9165.
2011-02-12 14:40:33 +00:00
MBlaze
fix visitShift to properly zero extend the shift amount if the provided operand
2011-02-13 09:02:52 +00:00
Mips
Disable this test for now...
2011-02-11 02:59:08 +00:00
MSP430
Enhance ComputeMaskedBits to know that aligned frameindexes
2011-02-13 22:25:43 +00:00
PowerPC
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PTX
ptx: add passing parameter to kernel functions
2011-02-10 12:01:24 +00:00
SPARC
Generate correct Sparc32 ABI compliant code for functions that return a struct.
2011-02-21 03:42:44 +00:00
SystemZ
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Thumb
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Thumb2
Move a test that ended up in the wrong place.
2011-02-05 04:15:50 +00:00
X86
Revert r126195, "test/CodeGen/X86/vec_cast.ll: Mark as XFAIL: migw,win32 for workaround of PR8311."
2011-02-22 08:22:54 +00:00
XCore
Add XCore intrinsic for settw instruction.
2011-02-23 14:45:03 +00:00
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