llvm-6502/lib/Target/Alpha
Dan Gohman 8e5f2c6f65 Pool-allocation for MachineInstrs, MachineBasicBlocks, and
MachineMemOperands. The pools are owned by MachineFunctions.

This drastically reduces the number of calls to malloc/free made
during the "Emit" phase of scheduling, as well as later phases
in CodeGen. Combined with other changes, this speeds up the
"instruction selection" phase of CodeGen by 10% in some cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53212 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-07 23:14:23 +00:00
..
Alpha.h SimpleInstructionSelector is here no more. 2008-06-25 16:38:59 +00:00
Alpha.td Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
AlphaAsmPrinter.cpp Add CommonLinkage; currently tentative definitions 2008-05-14 20:12:51 +00:00
AlphaBranchSelector.cpp rename MachineInstr::setInstrDescriptor -> setDesc 2008-01-11 18:10:50 +00:00
AlphaCodeEmitter.cpp Unbreak JIT. Ignore TargetInstrInfo::IMPLICIT_DEF. 2008-03-17 06:56:52 +00:00
AlphaInstrFormats.td llvm.memory.barrier, and impl for x86 and alpha 2008-02-16 01:24:58 +00:00
AlphaInstrInfo.cpp Pool-allocation for MachineInstrs, MachineBasicBlocks, and 2008-07-07 23:14:23 +00:00
AlphaInstrInfo.h Change target-specific classes to use more precise static types. 2008-05-14 01:58:56 +00:00
AlphaInstrInfo.td Added MemOperands to Atomic operations since Atomics touches memory. 2008-06-25 08:15:39 +00:00
AlphaISelDAGToDAG.cpp Split scheduling from instruction selection. 2008-06-30 20:45:06 +00:00
AlphaISelLowering.cpp Pool-allocation for MachineInstrs, MachineBasicBlocks, and 2008-07-07 23:14:23 +00:00
AlphaISelLowering.h Rather than having a different custom legalization 2008-07-04 11:47:58 +00:00
AlphaJITInfo.cpp Correlate stubs with functions in JIT: when emitting a stub, the JIT tells the memory manager which function 2008-04-16 20:46:05 +00:00
AlphaJITInfo.h Correlate stubs with functions in JIT: when emitting a stub, the JIT tells the memory manager which function 2008-04-16 20:46:05 +00:00
AlphaLLRP.cpp Replace all target specific implicit def instructions with a target independent one: TargetInstrInfo::IMPLICIT_DEF. 2008-03-15 00:03:38 +00:00
AlphaRegisterInfo.cpp Pool-allocation for MachineInstrs, MachineBasicBlocks, and 2008-07-07 23:14:23 +00:00
AlphaRegisterInfo.h Move reMaterialize() from TargetRegisterInfo to TargetInstrInfo. 2008-03-31 20:40:39 +00:00
AlphaRegisterInfo.td Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
AlphaRelocations.h Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
AlphaSchedule.td Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
AlphaSubtarget.cpp Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
AlphaSubtarget.h Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
AlphaTargetAsmInfo.cpp Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
AlphaTargetAsmInfo.h Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
AlphaTargetMachine.cpp Clean up the use of static and anonymous namespaces. This turned up 2008-05-13 00:00:25 +00:00
AlphaTargetMachine.h Change target-specific classes to use more precise static types. 2008-05-14 01:58:56 +00:00
Makefile remove attribution from lib Makefiles. 2007-12-29 20:09:26 +00:00
README.txt Readme 2007-03-31 15:05:44 +00:00

***

add gcc builtins for alpha instructions


***

custom expand byteswap into nifty 
extract/insert/mask byte/word/longword/quadword low/high
sequences

***

see if any of the extract/insert/mask operations can be added

***

match more interesting things for cmovlbc cmovlbs (move if low bit clear/set)

***

lower srem and urem

remq(i,j):  i - (j * divq(i,j)) if j != 0
remqu(i,j): i - (j * divqu(i,j)) if j != 0
reml(i,j):  i - (j * divl(i,j)) if j != 0
remlu(i,j): i - (j * divlu(i,j)) if j != 0

***

add crazy vector instructions (MVI):

(MIN|MAX)(U|S)(B8|W4) min and max, signed and unsigned, byte and word
PKWB, UNPKBW pack/unpack word to byte
PKLB UNPKBL pack/unpack long to byte
PERR pixel error (sum accross bytes of bytewise abs(i8v8 a - i8v8 b))

cmpbytes bytewise cmpeq of i8v8 a and i8v8 b (not part of MVI extentions)

this has some good examples for other operations that can be synthesised well 
from these rather meager vector ops (such as saturating add).
http://www.alphalinux.org/docs/MVI-full.html