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llvm-6502/lib/Target/R600
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Tom Stellard 2aab32cade R600/SI: Fix indirect addressing with a negative constant offset 
When the base register index of the vector plus the constant offset
was less than zero, we were passing the wrong base register to the indirect
addressing instruction.

In this case, we need to set the base register to v0 and then add
the computed (negative) index to m0.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235641 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-23 20:32:01 +00:00
..
AsmParser
R600/SI: Use a better error message for unsupported instructions in the assembler
2015-04-23 19:33:51 +00:00
InstPrinter
R600/SI: Initial support for assembler and inline assembly
2015-04-08 01:09:26 +00:00
MCTargetDesc
[mc] Clean up emission of byte sequences
2015-04-17 11:12:43 +00:00
TargetInfo
…
AMDGPU.h
…
AMDGPU.td
R600/SI: Add assembler support for all CI and VI VOP1 instructions
2015-04-23 19:33:54 +00:00
AMDGPUAlwaysInlinePass.cpp
R600: Fix always inline pass breaking noinline functions
2015-04-22 17:10:44 +00:00
AMDGPUAsmPrinter.cpp
R600/SI: Initial support for assembler and inline assembly
2015-04-08 01:09:26 +00:00
AMDGPUAsmPrinter.h
R600/SI: Add some missing overrides
2015-04-08 02:07:05 +00:00
AMDGPUCallingConv.td
…
AMDGPUFrameLowering.cpp
…
AMDGPUFrameLowering.h
…
AMDGPUInstrInfo.cpp
Remove the need to cache the subtarget in the R600 TargetRegisterInfo
2015-03-11 18:43:21 +00:00
AMDGPUInstrInfo.h
…
AMDGPUInstrInfo.td
Revert revisions r234755, r234759, r234760
2015-04-13 17:47:15 +00:00
AMDGPUInstructions.td
Reduce dyn_cast<> to isa<> or cast<> where possible.
2015-04-10 11:24:51 +00:00
AMDGPUIntrinsicInfo.cpp
…
AMDGPUIntrinsicInfo.h
…
AMDGPUIntrinsics.td
…
AMDGPUISelDAGToDAG.cpp
Reduce dyn_cast<> to isa<> or cast<> where possible.
2015-04-10 11:24:51 +00:00
AMDGPUISelLowering.cpp
Revert revisions r234755, r234759, r234760
2015-04-13 17:47:15 +00:00
AMDGPUISelLowering.h
Revert revisions r234755, r234759, r234760
2015-04-13 17:47:15 +00:00
AMDGPUMachineFunction.cpp
…
AMDGPUMachineFunction.h
…
AMDGPUMCInstLower.cpp
[MCInstPrinter] Enable MCInstPrinter to change its behavior based on the
2015-03-27 20:36:02 +00:00
AMDGPUMCInstLower.h
…
AMDGPUPromoteAlloca.cpp
Remove superfluous .str() and replace std::string concatenation with Twine.
2015-03-27 17:51:30 +00:00
AMDGPURegisterInfo.cpp
Remove the need to cache the subtarget in the R600 TargetRegisterInfo
2015-03-11 18:43:21 +00:00
AMDGPURegisterInfo.h
Remove the need to cache the subtarget in the R600 TargetRegisterInfo
2015-03-11 18:43:21 +00:00
AMDGPURegisterInfo.td
…
AMDGPUSubtarget.cpp
R600/SI: Add assembler support for all CI and VI VOP1 instructions
2015-04-23 19:33:54 +00:00
AMDGPUSubtarget.h
R600/SI: Add assembler support for all CI and VI VOP1 instructions
2015-04-23 19:33:54 +00:00
AMDGPUTargetMachine.cpp
Grab a subtarget off of an AMDGPUTargetMachine rather than a
2015-03-21 03:17:25 +00:00
AMDGPUTargetMachine.h
Remove the target independent TargetMachine::getSubtarget and
2015-03-21 04:22:23 +00:00
AMDGPUTargetTransformInfo.cpp
…
AMDGPUTargetTransformInfo.h
…
AMDILCFGStructurizer.cpp
CodeGen: Use the new DebugLoc API, NFC
2015-03-30 19:14:47 +00:00
AMDKernelCodeT.h
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CaymanInstructions.td
…
CIInstructions.td
R600/SI: Add assembler support for all CI and VI VOP1 instructions
2015-04-23 19:33:54 +00:00
CMakeLists.txt
…
EvergreenInstructions.td
Revert revisions r234755, r234759, r234760
2015-04-13 17:47:15 +00:00
LLVMBuild.txt
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Makefile
…
Processors.td
…
R600ClauseMergePass.cpp
Re-sort includes with sort-includes.py and insert raw_ostream.h where it's used.
2015-03-23 19:32:43 +00:00
R600ControlFlowFinalizer.cpp
…
R600Defines.h
…
R600EmitClauseMarkers.cpp
…
R600ExpandSpecialInstrs.cpp
…
R600InstrFormats.td
…
R600InstrInfo.cpp
Remove the need to cache the subtarget in the R600 TargetRegisterInfo
2015-03-11 18:43:21 +00:00
R600InstrInfo.h
…
R600Instructions.td
R600: Make FMIN/MAXNUM legal on all asics
2015-04-12 23:45:05 +00:00
R600Intrinsics.td
…
R600ISelLowering.cpp
Revert revisions r234755, r234759, r234760
2015-04-13 17:47:15 +00:00
R600ISelLowering.h
Revert revisions r234755, r234759, r234760
2015-04-13 17:47:15 +00:00
R600MachineFunctionInfo.cpp
…
R600MachineFunctionInfo.h
…
R600MachineScheduler.cpp
…
R600MachineScheduler.h
…
R600OptimizeVectorRegisters.cpp
Re-sort includes with sort-includes.py and insert raw_ostream.h where it's used.
2015-03-23 19:32:43 +00:00
R600Packetizer.cpp
…
R600RegisterInfo.cpp
Remove the need to cache the subtarget in the R600 TargetRegisterInfo
2015-03-11 18:43:21 +00:00
R600RegisterInfo.h
Remove the need to cache the subtarget in the R600 TargetRegisterInfo
2015-03-11 18:43:21 +00:00
R600RegisterInfo.td
…
R600Schedule.td
…
R600TextureIntrinsicsReplacer.cpp
Reduce dyn_cast<> to isa<> or cast<> where possible.
2015-04-10 11:24:51 +00:00
R700Instructions.td
…
SIAnnotateControlFlow.cpp
R600/SI: Fix verifier error caused by SIAnnotateControlFlow
2015-04-14 14:36:45 +00:00
SIDefines.h
…
SIFixSGPRCopies.cpp
…
SIFixSGPRLiveRanges.cpp
Re-sort includes with sort-includes.py and insert raw_ostream.h where it's used.
2015-03-23 19:32:43 +00:00
SIFoldOperands.cpp
Re-sort includes with sort-includes.py and insert raw_ostream.h where it's used.
2015-03-23 19:32:43 +00:00
SIInsertWaits.cpp
Remove the need to cache the subtarget in the R600 TargetRegisterInfo
2015-03-11 18:43:21 +00:00
SIInstrFormats.td
R600/SI: Initial support for assembler and inline assembly
2015-04-08 01:09:26 +00:00
SIInstrInfo.cpp
R600/SI: Improve BFM support
2015-03-24 13:40:21 +00:00
SIInstrInfo.h
R600/SI: Merge tables for commuting
2015-03-23 18:45:41 +00:00
SIInstrInfo.td
R600/SI: Add assembler support for all CI and VI VOP1 instructions
2015-04-23 19:33:54 +00:00
SIInstructions.td
R600/SI: v_mov_fed_b32 does not exist on VI
2015-04-23 19:33:52 +00:00
SIIntrinsics.td
…
SIISelLowering.cpp
R600: Make FMIN/MAXNUM legal on all asics
2015-04-12 23:45:05 +00:00
SIISelLowering.h
R600/SI: Add some missing overrides
2015-04-08 02:07:05 +00:00
SILoadStoreOptimizer.cpp
Re-sort includes with sort-includes.py and insert raw_ostream.h where it's used.
2015-03-23 19:32:43 +00:00
SILowerControlFlow.cpp
R600/SI: Fix indirect addressing with a negative constant offset
2015-04-23 20:32:01 +00:00
SILowerI1Copies.cpp
…
SIMachineFunctionInfo.cpp
…
SIMachineFunctionInfo.h
…
SIPrepareScratchRegs.cpp
…
SIRegisterInfo.cpp
R600/SI: Insert more NOPs after READLANE on VI, don't use NOPs on CI
2015-03-24 13:40:38 +00:00
SIRegisterInfo.h
Remove the need to cache the subtarget in the R600 TargetRegisterInfo
2015-03-11 18:43:21 +00:00
SIRegisterInfo.td
R600/SI: Initial support for assembler and inline assembly
2015-04-08 01:09:26 +00:00
SISchedule.td
…
SIShrinkInstructions.cpp
Purge unused includes throughout libSupport.
2015-03-23 18:07:13 +00:00
SITypeRewriter.cpp
Remove more superfluous .str() and replace std::string concatenation with Twine.
2015-03-30 15:42:36 +00:00
VIInstrFormats.td
…
VIInstructions.td
R600/SI: Add assembler support for all CI and VI VOP1 instructions
2015-04-23 19:33:54 +00:00