Andrew Lenharth eececbab32 add br pattern, unify JSR and BSR ISel instrs, and add BSR support for DAG ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25011 91177308-0d34-0410-b5e6-96231b3b80d8		2005-12-25 17:36:48 +00:00
..
Alpha	add br pattern, unify JSR and BSR ISel instrs, and add BSR support for DAG	2005-12-25 17:36:48 +00:00
CBackend
IA64	unbreak calls, a few more tests should run. Tomorrow: bugpoint!	2005-12-25 14:09:08 +00:00
PowerPC	Fix one of the things in the todo file, and get a bit closer to folding	2005-12-24 01:00:15 +00:00
Skeleton
Sparc	* Removed the use of FLAG. Now use hasFlagIn and hasFlagOut instead.	2005-12-23 22:14:32 +00:00
SparcV8	* Removed the use of FLAG. Now use hasFlagIn and hasFlagOut instead.	2005-12-23 22:14:32 +00:00
SparcV9
X86	Let the helper functions know about X86::FR32RegClass and X86::FR64RegClass.	2005-12-24 09:48:35 +00:00
Makefile
MRegisterInfo.cpp
SubtargetFeature.cpp
Target.td	* Removed the use of FLAG. Now use hasFlagIn and hasFlagOut instead.	2005-12-23 22:14:32 +00:00
TargetData.cpp
TargetFrameInfo.cpp
TargetInstrInfo.cpp
TargetMachine.cpp
TargetMachineRegistry.cpp
TargetSchedInfo.cpp
TargetSchedule.td
TargetSelectionDAG.td	support targetexternalsym	2005-12-24 23:36:59 +00:00
TargetSubtarget.cpp