llvm-6502/test/CodeGen
Bill Wendling 2af1d85c5d Merging r195129:
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r195129 | mcinally | 2013-11-19 06:36:00 -0800 (Tue, 19 Nov 2013) | 2 lines

Fix assembly operands for the SSE2 cvtsd2ss instruction.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195218 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-20 06:17:43 +00:00
..
AArch64 Implement AArch64 neon instructions class SIMD lsone and SIMD lone-post. 2013-11-19 02:17:05 +00:00
ARM [PR17978] Mark two ARM/fast-isel tests as XFAIL:vg_leak due to GV. 2013-11-18 13:50:19 +00:00
CPP
Generic Error if we see an alias to a declaration. 2013-11-14 13:58:06 +00:00
Hexagon
Inputs
Mips [mips] Fix 'ran out of registers' in MIPS32 with FP64 when generating code for (ConstantFP 0.0) 2013-11-18 13:12:43 +00:00
MSP430
NVPTX [NVPTX] Fix handling of indirect calls 2013-11-15 12:30:04 +00:00
PowerPC Avoid illegal integer promotion in fastisel 2013-11-15 19:09:27 +00:00
R600 R600/SI: Fix moveToVALU when the first operand is VSrc. 2013-11-18 20:09:55 +00:00
SPARC [SparcV9] Handle i64 <-> float conversions in sparcv9 mode. 2013-11-03 12:28:40 +00:00
SystemZ
Thumb
Thumb2 Enable generating legacy IT block for AArch32 2013-11-13 18:29:49 +00:00
X86 Merging r195129: 2013-11-20 06:17:43 +00:00
XCore Error if we see an alias to a declaration. 2013-11-14 13:58:06 +00:00