Tom Stellard 2b272a1c8c R600: Implement TargetLowering::getVectorIdxTy() ...

We use MVT::i32 for the vector index type, because we use 32-bit
operations to caculate offsets when dynamically indexing vectors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187749 91177308-0d34-0410-b5e6-96231b3b80d8

2013-08-05 22:22:07 +00:00

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Analysis

Minor address space code simplification.

2013-08-03 01:03:12 +00:00

AsmParser

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Bitcode

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CodeGen

TargetLowering: Add getVectorIdxTy() function v2

2013-08-05 22:22:01 +00:00

DebugInfo

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ExecutionEngine

LLVM Interpreter: This patch implements vector support for cast operations (zext, sext, uitofp, sitofp, trunc, fpext, fptosi, fptrunc, bitcast) and shift operations (shl, ashr, lshr) for integer and floating point data types.

2013-08-05 12:17:06 +00:00

IR

Add a AttributeSetImpl::dump function.

2013-08-02 22:34:30 +00:00

IRReader

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Linker

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MC

AsmParser: Store MacroLikeBodies on the side so they don't get leaked.

2013-08-04 09:06:29 +00:00

Object

MachObjectFile: Don't leak on error.

2013-08-03 22:16:37 +00:00

Option

Option parsing: recognize the special -- token

2013-08-02 21:20:27 +00:00

Support

Introduce Regex::isLiteralERE function.

2013-08-05 17:47:59 +00:00

TableGen

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Target

R600: Implement TargetLowering::getVectorIdxTy()

2013-08-05 22:22:07 +00:00

Transforms

Introduce an optimisation for special case lists with large numbers of literal entries.

2013-08-05 17:48:04 +00:00

CMakeLists.txt

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LLVMBuild.txt

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Makefile

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