Tom Stellard d8c31046a9 R600/SI: Custom select 64-bit ADD ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202194 91177308-0d34-0410-b5e6-96231b3b80d8		2014-02-25 21:36:18 +00:00
..
AArch64	[AArch64] Add register constraints to avoid generating STLXR and STXR with unpredictable behavior.	2014-02-21 07:45:48 +00:00
ARM	Keep the link register for uwtable.	2014-02-25 16:57:28 +00:00
CPP
Generic	Re-commit: Demote EmitRawText call in AsmPrinter::EmitInlineAsm() and remove hasRawTextSupport() call	2014-02-13 14:44:26 +00:00
Hexagon	Fix broken CHECK lines	2014-02-16 07:31:05 +00:00
Inputs
Mips	[mips] Make it impossible to have UnknownABI in CodeGen and Integrated Assembler.	2014-02-20 14:58:19 +00:00
MSP430
NVPTX
PowerPC	Account for 128-bit integer operations in PPCCTRLoops	2014-02-25 20:51:50 +00:00
R600	R600/SI: Custom select 64-bit ADD	2014-02-25 21:36:18 +00:00
SPARC	SPARC: Implement TRAP lowering. Matches what GCC emits.	2014-02-23 21:43:52 +00:00
SystemZ	Re-commit: Demote EmitRawText call in AsmPrinter::EmitInlineAsm() and remove hasRawTextSupport() call	2014-02-13 14:44:26 +00:00
Thumb	Add triples to try to fix the windows bots.	2014-02-13 16:49:47 +00:00
Thumb2	Add extra CHECK prefix to tests with explicit prefix	2014-02-16 13:28:15 +00:00
X86	Store a DataLayout in Module.	2014-02-25 20:01:08 +00:00
XCore	[XCore] Add intrinsic for CLRPT (clear port time) instruction.	2014-02-25 17:31:15 +00:00