llvm-6502/lib/Target
Evan Cheng 2b4ea795a2 Added field noResults to Instruction.
Currently tblgen cannot tell which operands in the operand list are results so
it assumes the first one is a result. This is bad. Ideally we would fix this
by separating results from inputs, e.g. (res R32:$dst),
(ops R32:$src1, R32:$src2). But that's a more distruptive change. Adding
'let noResults = 1' is the workaround to tell tblgen that the instruction does
not produces a result. It works for now since tblgen does not support
instructions which produce multiple results.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25017 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-26 09:11:45 +00:00
..
Alpha Added field noResults to Instruction. 2005-12-26 09:11:45 +00:00
CBackend do not allow '.' in symbol names 2005-11-10 21:39:29 +00:00
IA64 Added field noResults to Instruction. 2005-12-26 09:11:45 +00:00
PowerPC Added field noResults to Instruction. 2005-12-26 09:11:45 +00:00
Skeleton Support multiple ValueTypes per RegisterClass, needed for upcoming vector 2005-12-01 04:51:06 +00:00
Sparc Added field noResults to Instruction. 2005-12-26 09:11:45 +00:00
SparcV8 Added field noResults to Instruction. 2005-12-26 09:11:45 +00:00
SparcV9 Support multiple ValueTypes per RegisterClass, needed for upcoming vector 2005-12-01 04:51:06 +00:00
X86 Added field noResults to Instruction. 2005-12-26 09:11:45 +00:00
Makefile
MRegisterInfo.cpp
SubtargetFeature.cpp
Target.td Added field noResults to Instruction. 2005-12-26 09:11:45 +00:00
TargetData.cpp
TargetFrameInfo.cpp
TargetInstrInfo.cpp
TargetMachine.cpp
TargetMachineRegistry.cpp
TargetSchedInfo.cpp
TargetSchedule.td
TargetSelectionDAG.td support targetexternalsym 2005-12-24 23:36:59 +00:00
TargetSubtarget.cpp