Vincent Lejeune dfef7cbfc6 R600: add a pass that merges clauses. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191790 91177308-0d34-0410-b5e6-96231b3b80d8		2013-10-01 19:32:58 +00:00
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AArch64
ARM	ARM: support interrupt attribute	2013-10-01 14:33:28 +00:00
CPP
Generic
Hexagon
Inputs
Mips
MSP430
NVPTX
PowerPC
R600	R600: add a pass that merges clauses.	2013-10-01 19:32:58 +00:00
SPARC
SystemZ	[SystemZ] Add comparisons of high words and memory	2013-10-01 15:00:44 +00:00
Thumb
Thumb2
X86	Add test case for PR16785.	2013-10-01 17:02:48 +00:00
XCore