Nadav Rotem a569a80e58 Allow merging multiple store sequences on the same chain. ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169111 91177308-0d34-0410-b5e6-96231b3b80d8

2012-12-02 17:14:09 +00:00

..

ARM

Simplify REG_SEQUENCE lowering.

2012-12-01 01:06:44 +00:00

CPP

test commit

2012-07-18 17:53:05 +00:00

Generic

Codegen support for arbitrary vector getelementptrs.

2012-11-13 13:01:58 +00:00

Hexagon

test/CodeGen/Hexagon/postinc-load.ll: Suppress it for now. It triggered the failure on i686 hosts.

2012-11-14 22:22:37 +00:00

MBlaze

…

Mips

[mips] Generate big GOT code.

2012-11-21 20:40:38 +00:00

MSP430

Add support for varargs functions for msp430.

2012-11-21 17:28:27 +00:00

NVPTX

Teach the legalizer how to handle operands for VSELECT nodes

2012-11-29 14:26:28 +00:00

PowerPC

test/CodeGen/PowerPC/vec_mul.ll: Add a triple. Thanks, Hal.

2012-11-30 19:15:10 +00:00

SPARC

Use TargetTransformInfo to control switch-to-lookup table transformation

2012-10-30 11:23:25 +00:00

Thumb

Convert an improper CodeGen test to a MC test.

2012-11-10 04:30:40 +00:00

Thumb2

Add GPRPair Register class to ARM.

2012-10-26 21:29:15 +00:00

X86

Allow merging multiple store sequences on the same chain.

2012-12-02 17:14:09 +00:00

XCore

Fix handling of aliases to functions.

2012-11-16 21:12:38 +00:00