Sanjay Patel 2b918388ab Lower FNEG ( FABS (x) ) -> FNABS (x) [X86 codegen] PR20578 ... Negative FABS of either a scalar or vector should be handled the same way on x86 with SSE/AVX: a single OR instruction of the FP operand with a constant to light up the sign bit(s). http://llvm.org/bugs/show_bug.cgi?id=20578 Differential Revision: http://reviews.llvm.org/D5201 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218822 91177308-0d34-0410-b5e6-96231b3b80d8		2014-10-01 21:20:06 +00:00
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AArch64	Move the complex address expression out of DIVariable and into an extra	2014-10-01 18:55:02 +00:00
ARM	ARM: allow copying of CPSR when all else fails.	2014-10-01 19:21:03 +00:00
CPP
Generic	ARM: yes it can (as of r218789)	2014-10-01 20:31:58 +00:00
Hexagon	Move the complex address expression out of DIVariable and into an extra	2014-10-01 18:55:02 +00:00
Inputs	Move the complex address expression out of DIVariable and into an extra	2014-10-01 18:55:02 +00:00
Mips
MSP430
NVPTX
PowerPC	Move the complex address expression out of DIVariable and into an extra	2014-10-01 18:55:02 +00:00
R600
SPARC
SystemZ
Thumb	Move the complex address expression out of DIVariable and into an extra	2014-10-01 18:55:02 +00:00
Thumb2
X86	Lower FNEG ( FABS (x) ) -> FNABS (x) [X86 codegen] PR20578	2014-10-01 21:20:06 +00:00
XCore	Move the complex address expression out of DIVariable and into an extra	2014-10-01 18:55:02 +00:00