llvm-6502/test/MC
Jim Grosbach 2bd0118472 ARM assembly parsing and encoding for LDC{2}{L}/STC{2}{L} instructions.
Fill out the rest of the encoding information, update to properly mark
the LDC/STC instructions as predicable while the LDC2/STC2 instructions are
not, and adjust the parser accordingly.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141721 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 21:55:36 +00:00
..
ARM ARM assembly parsing and encoding for LDC{2}{L}/STC{2}{L} instructions. 2011-10-11 21:55:36 +00:00
AsmParser
COFF
Disassembler Update test for r141704. 2011-10-11 20:18:50 +00:00
ELF Apparently, sometimes llvm-nm doesn't put the undefined symbol at the top. Take 2011-10-11 06:58:11 +00:00
MachO
MBlaze
X86 Revert part of r141274. Only need to change encoding for xchg %eax, %eax in 64-bit mode. This is because in 64-bit mode xchg %eax, %eax implies zeroing the upper 32-bits of RAX which makes it not a NOP. In 32-bit mode using NOP encoding is fine. 2011-10-07 05:35:38 +00:00