llvm-6502

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Bill Wendling 2bdc0dd2db Merging r196588:

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r196588 | weimingz | 2013-12-06 09:56:48 -0800 (Fri, 06 Dec 2013) | 7 lines

Bug 18149: [AArch32] VSel instructions has no ARMCC field

The current peephole optimizing for compare inst assumes an instr that
uses CPSR has an MO for ARM Cond code.However, for VSEL instructions
(vseqeq, vselgt, vselgt, vselvs), there is no such operand nor do
they support the modification of Cond Code.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196704 91177308-0d34-0410-b5e6-96231b3b80d8

2013-12-08 00:17:29 +00:00

AArch64

Merging r196456:

2013-12-08 00:07:48 +00:00

ARM

Merging r196588:

2013-12-08 00:17:29 +00:00

CPP

…

Generic

Merging r195339:

2013-11-21 20:18:40 +00:00