mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-11-19 01:13:25 +00:00
ae3a0be92e
integer and floating-point opcodes, introducing FAdd, FSub, and FMul. For now, the AsmParser, BitcodeReader, and IRBuilder all preserve backwards compatability, and the Core LLVM APIs preserve backwards compatibility for IR producers. Most front-ends won't need to change immediately. This implements the first step of the plan outlined here: http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72897 91177308-0d34-0410-b5e6-96231b3b80d8
30 lines
861 B
LLVM
30 lines
861 B
LLVM
; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2
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; RUN: llvm-as < %s | llc -march=arm -mattr=vfp2 | not grep fstd
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define hidden i64 @__fixunsdfdi(double %x) nounwind readnone {
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entry:
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%x14 = bitcast double %x to i64 ; <i64> [#uses=1]
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br i1 true, label %bb3, label %bb10
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bb3: ; preds = %entry
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br i1 true, label %bb5, label %bb7
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bb5: ; preds = %bb3
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%u.in.mask = and i64 %x14, -4294967296 ; <i64> [#uses=1]
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%.ins = or i64 0, %u.in.mask ; <i64> [#uses=1]
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%0 = bitcast i64 %.ins to double ; <double> [#uses=1]
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%1 = fsub double %x, %0 ; <double> [#uses=1]
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%2 = fptosi double %1 to i32 ; <i32> [#uses=1]
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%3 = add i32 %2, 0 ; <i32> [#uses=1]
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%4 = zext i32 %3 to i64 ; <i64> [#uses=1]
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%5 = shl i64 %4, 32 ; <i64> [#uses=1]
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%6 = or i64 %5, 0 ; <i64> [#uses=1]
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ret i64 %6
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bb7: ; preds = %bb3
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ret i64 0
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bb10: ; preds = %entry
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ret i64 0
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}
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