..
AArch64
AArch64: Add support for instruction prefetch intrinsic
2014-08-05 12:46:47 +00:00
ARM
ARM: do not generate BLX instructions on Cortex-M CPUs.
2014-08-06 11:13:14 +00:00
CPP
IR: add "cmpxchg weak" variant to support permitted failure.
2014-06-13 14:24:07 +00:00
Generic
Use "weak alias" instead of "alias weak"
2014-07-30 22:51:54 +00:00
Hexagon
DebugInfo: Assert that any CU for which debug_loc lists are emitted, has at least one range.
2014-08-06 00:21:25 +00:00
Inputs
Mips
llvm/test/CodeGen/Mips/cconv/arguments-varargs.ll: Add explicit -mtriple=(mips|mipsel)-linux on 4 lines.
2014-08-01 22:15:38 +00:00
MSP430
Reduce verbiage of lit.local.cfg files
2014-06-09 22:42:55 +00:00
NVPTX
[NVPTX] Add some extra tests for mul.wide to test non-power-of-two source types
2014-07-23 20:23:49 +00:00
PowerPC
[PowerPC] Swap arguments and adjust shift count for vsldoi on little endian
2014-08-05 20:47:25 +00:00
R600
R600: Increase nearby load scheduling threshold.
2014-08-06 00:29:49 +00:00
SPARC
IR: add "cmpxchg weak" variant to support permitted failure.
2014-06-13 14:24:07 +00:00
SystemZ
IR: add "cmpxchg weak" variant to support permitted failure.
2014-06-13 14:24:07 +00:00
Thumb
[ARM] In dynamic-no-pic mode, ARM's post-RA pseudo expansion was incorrectly
2014-08-02 05:40:40 +00:00
Thumb2
ARM: do not generate BLX instructions on Cortex-M CPUs.
2014-08-06 11:13:14 +00:00
X86
[x86] Fix two independent miscompiles in the process of getting the same
2014-08-06 10:16:36 +00:00
XCore
llvm/test/CodeGen/XCore/dwarf_debug.ll: Fix not to be affected by *-win32.
2014-07-04 11:58:03 +00:00