Evan Cheng dbf67fefea Adding a v8i64 512-bit vector type. This will be used to model ARM NEON intrinsics which translate into a pair of vld / vst instructions that can load / store 8 consecutive 64-bit (D) registers. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103746 91177308-0d34-0410-b5e6-96231b3b80d8		2010-05-13 23:55:47 +00:00
..
AsmWriter.cpp	fix PR7105 by enumerating MDNodes on all @llvm.foo	2010-05-10 20:53:17 +00:00
Attributes.cpp
AutoUpgrade.cpp
BasicBlock.cpp
CMakeLists.txt
ConstantFold.cpp
ConstantFold.h
Constants.cpp	Remove the API compatibility layer which converted add, sub, and mul	2010-05-03 22:44:19 +00:00
ConstantsContext.h
Core.cpp
DebugLoc.cpp
Dominators.cpp
Function.cpp
Globals.cpp
GVMaterializer.cpp
InlineAsm.cpp
Instruction.cpp
Instructions.cpp	Remove the API compatibility layer which converted add, sub, and mul	2010-05-03 22:44:19 +00:00
IntrinsicInst.cpp
IRBuilder.cpp
LeakDetector.cpp
LeaksContext.h
LLVMContext.cpp
LLVMContextImpl.cpp
LLVMContextImpl.h
Makefile
Metadata.cpp	Fix a problem exposed by my previous commit and noticed by a release-asserts	2010-05-04 14:25:42 +00:00
Module.cpp
Pass.cpp
PassManager.cpp	Revert r103493, materializing functions in the regular PassManager.	2010-05-11 20:30:00 +00:00
PrintModulePass.cpp
SymbolTableListTraitsImpl.h
Type.cpp
TypesContext.h
TypeSymbolTable.cpp
Use.cpp
Value.cpp
ValueSymbolTable.cpp
ValueTypes.cpp	Adding a v8i64 512-bit vector type. This will be used to model ARM NEON intrinsics which translate into a pair of vld / vst instructions that can load / store 8 consecutive 64-bit (D) registers.	2010-05-13 23:55:47 +00:00
Verifier.cpp	simplify more.	2010-05-10 20:59:18 +00:00