llvm-6502/test/CodeGen
Hal Finkel 2c77a625b7 Fix a PPC rlwimi instruction-selection bug
Under certain (evidently rare) circumstances, this code used to convert OR(a,
AND(x, y)) into OR(a, x). This was incorrect.

While there, I've added a comment to the code immediately above.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185201 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-28 20:00:07 +00:00
..
AArch64 AArch64: remove accidental test output file. 2013-06-18 21:16:53 +00:00
ARM Add missing case to switch statement - DAGTypeLegalizer::ExpandIntegerResult 2013-06-28 18:36:42 +00:00
CPP
Generic Debug Info: clean up usage of Verify. 2013-06-28 05:43:10 +00:00
Hexagon
Inputs
MBlaze
Mips [mips] Improve code generation for constant multiplication using shifts, adds and 2013-06-26 18:48:17 +00:00
MSP430
NVPTX [NVPTX] Add (1.0 / sqrt(x)) => rsqrt(x) generation when allowable by FP flags 2013-06-28 17:58:13 +00:00
PowerPC Fix a PPC rlwimi instruction-selection bug 2013-06-28 20:00:07 +00:00
R600 R600: Add local memory support via LDS 2013-06-28 15:47:08 +00:00
SI
SPARC Switch spill weights from a basic loop depth estimation to BlockFrequencyInfo. 2013-06-17 19:00:36 +00:00
SystemZ [SystemZ] Fix some embarrassing test typos 2013-06-27 09:49:34 +00:00
Thumb
Thumb2 ARM: allow predicated barriers in Thumb mode 2013-06-26 16:52:32 +00:00
X86 Debug Info: clean up usage of Verify. 2013-06-28 05:43:10 +00:00
XCore