mirror of
https://github.com/c64scene-ar/llvm-6502.git
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2ca626570f
found with a smarter version of -Wunused-member-function that I'm playwing with. Appologies in advance if I removed someone's WIP code. include/llvm/CodeGen/MachineSSAUpdater.h | 1 include/llvm/IR/DebugInfo.h | 3 lib/CodeGen/MachineSSAUpdater.cpp | 10 -- lib/CodeGen/PostRASchedulerList.cpp | 1 lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 10 -- lib/IR/DebugInfo.cpp | 12 -- lib/MC/MCAsmStreamer.cpp | 2 lib/Support/YAMLParser.cpp | 39 --------- lib/TableGen/TGParser.cpp | 16 --- lib/TableGen/TGParser.h | 1 lib/Target/AArch64/AArch64TargetTransformInfo.cpp | 9 -- lib/Target/ARM/ARMCodeEmitter.cpp | 12 -- lib/Target/ARM/ARMFastISel.cpp | 84 -------------------- lib/Target/Mips/MipsCodeEmitter.cpp | 11 -- lib/Target/Mips/MipsConstantIslandPass.cpp | 12 -- lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp | 21 ----- lib/Target/NVPTX/NVPTXISelDAGToDAG.h | 2 lib/Target/PowerPC/PPCFastISel.cpp | 1 lib/Transforms/Instrumentation/AddressSanitizer.cpp | 2 lib/Transforms/Instrumentation/BoundsChecking.cpp | 2 lib/Transforms/Instrumentation/MemorySanitizer.cpp | 1 lib/Transforms/Scalar/LoopIdiomRecognize.cpp | 8 - lib/Transforms/Scalar/SCCP.cpp | 1 utils/TableGen/CodeEmitterGen.cpp | 2 24 files changed, 2 insertions(+), 261 deletions(-) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204560 91177308-0d34-0410-b5e6-96231b3b80d8
96 lines
3.0 KiB
C++
96 lines
3.0 KiB
C++
//===-- NVPTXISelDAGToDAG.h - A dag to dag inst selector for NVPTX --------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines an instruction selector for the NVPTX target.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "nvptx-isel"
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#include "NVPTX.h"
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#include "NVPTXISelLowering.h"
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#include "NVPTXRegisterInfo.h"
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#include "NVPTXTargetMachine.h"
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#include "llvm/CodeGen/SelectionDAGISel.h"
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#include "llvm/IR/Intrinsics.h"
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#include "llvm/Support/Compiler.h"
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using namespace llvm;
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namespace {
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class LLVM_LIBRARY_VISIBILITY NVPTXDAGToDAGISel : public SelectionDAGISel {
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// If true, generate corresponding FPCONTRACT. This is
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// language dependent (i.e. CUDA and OpenCL works differently).
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bool doFMAF64;
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bool doFMAF32;
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bool doFMAF64AGG;
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bool doFMAF32AGG;
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bool allowFMA;
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// If true, generate mul.wide from sext and mul
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bool doMulWide;
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int getDivF32Level() const;
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bool usePrecSqrtF32() const;
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bool useF32FTZ() const;
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public:
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explicit NVPTXDAGToDAGISel(NVPTXTargetMachine &tm,
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CodeGenOpt::Level OptLevel);
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// Pass Name
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virtual const char *getPassName() const {
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return "NVPTX DAG->DAG Pattern Instruction Selection";
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}
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const NVPTXSubtarget &Subtarget;
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virtual bool SelectInlineAsmMemoryOperand(
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const SDValue &Op, char ConstraintCode, std::vector<SDValue> &OutOps);
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private:
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// Include the pieces autogenerated from the target description.
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#include "NVPTXGenDAGISel.inc"
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SDNode *Select(SDNode *N);
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SDNode *SelectLoad(SDNode *N);
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SDNode *SelectLoadVector(SDNode *N);
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SDNode *SelectLDGLDUVector(SDNode *N);
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SDNode *SelectStore(SDNode *N);
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SDNode *SelectStoreVector(SDNode *N);
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SDNode *SelectLoadParam(SDNode *N);
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SDNode *SelectStoreRetval(SDNode *N);
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SDNode *SelectStoreParam(SDNode *N);
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inline SDValue getI32Imm(unsigned Imm) {
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return CurDAG->getTargetConstant(Imm, MVT::i32);
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}
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// Match direct address complex pattern.
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bool SelectDirectAddr(SDValue N, SDValue &Address);
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bool SelectADDRri_imp(SDNode *OpNode, SDValue Addr, SDValue &Base,
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SDValue &Offset, MVT mvt);
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bool SelectADDRri(SDNode *OpNode, SDValue Addr, SDValue &Base,
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SDValue &Offset);
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bool SelectADDRri64(SDNode *OpNode, SDValue Addr, SDValue &Base,
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SDValue &Offset);
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bool SelectADDRsi_imp(SDNode *OpNode, SDValue Addr, SDValue &Base,
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SDValue &Offset, MVT mvt);
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bool SelectADDRsi(SDNode *OpNode, SDValue Addr, SDValue &Base,
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SDValue &Offset);
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bool SelectADDRsi64(SDNode *OpNode, SDValue Addr, SDValue &Base,
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SDValue &Offset);
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bool ChkMemSDNodeAddressSpace(SDNode *N, unsigned int spN) const;
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};
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}
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