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https://github.com/c64scene-ar/llvm-6502.git
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67e4132caa
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4326 91177308-0d34-0410-b5e6-96231b3b80d8
232 lines
8.6 KiB
C++
232 lines
8.6 KiB
C++
//===-- llvm/Target/RegInfo.h - Target Register Information ------*- C++ -*-==//
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//
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// This file is used to describe the register system of a target to the
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// register allocator.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_TARGET_MACHINEREGINFO_H
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#define LLVM_TARGET_MACHINEREGINFO_H
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#include "Support/NonCopyable.h"
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#include "Support/hash_map"
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#include <string>
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class TargetMachine;
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class IGNode;
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class Type;
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class Value;
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class LiveRangeInfo;
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class Function;
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class LiveRange;
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class AddedInstrns;
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class MachineInstr;
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class PhyRegAlloc;
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class BasicBlock;
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//-----------------------------------------------------------------------------
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// class MachineRegClassInfo
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//
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// Purpose:
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// Interface to description of machine register class (e.g., int reg class
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// float reg class etc)
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//
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//--------------------------------------------------------------------------
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class MachineRegClassInfo {
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protected:
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const unsigned RegClassID; // integer ID of a reg class
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const unsigned NumOfAvailRegs; // # of avail for coloring -without SP etc.
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const unsigned NumOfAllRegs; // # of all registers -including SP,g0 etc.
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public:
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inline unsigned getRegClassID() const { return RegClassID; }
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inline unsigned getNumOfAvailRegs() const { return NumOfAvailRegs; }
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inline unsigned getNumOfAllRegs() const { return NumOfAllRegs; }
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// This method should find a color which is not used by neighbors
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// (i.e., a false position in IsColorUsedArr) and
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virtual void colorIGNode(IGNode *Node,
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std::vector<bool> &IsColorUsedArr) const = 0;
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virtual bool isRegVolatile(int Reg) const = 0;
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MachineRegClassInfo(unsigned ID, unsigned NVR, unsigned NAR)
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: RegClassID(ID), NumOfAvailRegs(NVR), NumOfAllRegs(NAR) {}
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};
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//---------------------------------------------------------------------------
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// class MachineRegInfo
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//
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// Purpose:
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// Interface to register info of target machine
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//
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//--------------------------------------------------------------------------
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class MachineRegInfo : public NonCopyableV {
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protected:
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// A vector of all machine register classes
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//
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std::vector<const MachineRegClassInfo *> MachineRegClassArr;
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public:
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const TargetMachine ⌖
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MachineRegInfo(const TargetMachine& tgt) : target(tgt) { }
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~MachineRegInfo() {
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for (unsigned i = 0, e = MachineRegClassArr.size(); i != e; ++i)
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delete MachineRegClassArr[i];
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}
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// According the definition of a MachineOperand class, a Value in a
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// machine instruction can go into either a normal register or a
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// condition code register. If isCCReg is true below, the ID of the condition
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// code register class will be returned. Otherwise, the normal register
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// class (eg. int, float) must be returned.
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virtual unsigned getRegClassIDOfType (const Type *type,
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bool isCCReg = false) const =0;
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virtual unsigned getRegClassIDOfValue (const Value *Val,
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bool isCCReg = false) const =0;
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virtual unsigned getRegClassIDOfReg (int unifiedRegNum) const =0;
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virtual unsigned getRegClassIDOfRegType(int regType) const =0;
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inline unsigned int getNumOfRegClasses() const {
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return MachineRegClassArr.size();
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}
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const MachineRegClassInfo *getMachineRegClass(unsigned i) const {
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return MachineRegClassArr[i];
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}
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// returns the register that is hardwired to zero if any (-1 if none)
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//
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virtual int getZeroRegNum() const = 0;
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// Number of registers used for passing int args (usually 6: %o0 - %o5)
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// and float args (usually 32: %f0 - %f31)
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//
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virtual unsigned const GetNumOfIntArgRegs() const = 0;
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virtual unsigned const GetNumOfFloatArgRegs() const = 0;
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// The following methods are used to color special live ranges (e.g.
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// method args and return values etc.) with specific hardware registers
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// as required. See SparcRegInfo.cpp for the implementation for Sparc.
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//
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virtual void suggestRegs4MethodArgs(const Function *Func,
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LiveRangeInfo &LRI) const = 0;
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virtual void suggestRegs4CallArgs(MachineInstr *CallI,
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LiveRangeInfo &LRI) const = 0;
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virtual void suggestReg4RetValue(MachineInstr *RetI,
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LiveRangeInfo &LRI) const = 0;
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virtual void colorMethodArgs(const Function *Func, LiveRangeInfo &LRI,
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AddedInstrns *FirstAI) const = 0;
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virtual void colorCallArgs(MachineInstr *CalI,
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LiveRangeInfo& LRI, AddedInstrns *CallAI,
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PhyRegAlloc &PRA, const BasicBlock *BB) const = 0;
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virtual void colorRetValue(MachineInstr *RetI, LiveRangeInfo &LRI,
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AddedInstrns *RetAI) const = 0;
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// The following methods are used to generate "copy" machine instructions
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// for an architecture. Currently they are used in MachineRegClass
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// interface. However, they can be moved to MachineInstrInfo interface if
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// necessary.
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//
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// The function regTypeNeedsScratchReg() can be used to check whether a
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// scratch register is needed to copy a register of type `regType' to
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// or from memory. If so, such a scratch register can be provided by
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// the caller (e.g., if it knows which regsiters are free); otherwise
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// an arbitrary one will be chosen and spilled by the copy instructions.
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// If a scratch reg is needed, the reg. type that must be used
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// for scratch registers is returned in scratchRegType.
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//
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virtual bool regTypeNeedsScratchReg(int RegType,
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int& scratchRegType) const = 0;
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virtual void cpReg2RegMI(std::vector<MachineInstr*>& mvec,
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unsigned SrcReg, unsigned DestReg,
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int RegType) const = 0;
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virtual void cpReg2MemMI(std::vector<MachineInstr*>& mvec,
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unsigned SrcReg, unsigned DestPtrReg, int Offset,
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int RegType, int scratchReg = -1) const=0;
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virtual void cpMem2RegMI(std::vector<MachineInstr*>& mvec,
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unsigned SrcPtrReg, int Offset, unsigned DestReg,
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int RegType, int scratchReg = -1) const=0;
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virtual void cpValue2Value(Value *Src, Value *Dest,
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std::vector<MachineInstr*>& mvec) const = 0;
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virtual bool isRegVolatile(int RegClassID, int Reg) const = 0;
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// Returns the reg used for pushing the address when a method is called.
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// This can be used for other purposes between calls
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//
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virtual unsigned getCallAddressReg() const = 0;
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// Returns the register containing the return address.
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//It should be made sure that this
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// register contains the return value when a return instruction is reached.
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//
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virtual unsigned getReturnAddressReg() const = 0;
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// Each register class has a seperate space for register IDs. To convert
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// a regId in a register class to a common Id, or vice versa,
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// we use the folloing methods.
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//
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virtual int getUnifiedRegNum(unsigned regClassID, int reg) const = 0;
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virtual int getClassRegNum(int unifiedRegNum, unsigned& regClassID) const =0;
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// Returns the assembly-language name of the specified machine register.
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virtual const char * const getUnifiedRegName(int UnifiedRegNum) const = 0;
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// The following 4 methods are used to find the RegType (a target-specific
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// enum) for a reg class and a given primitive type, a LiveRange, a Value,
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// or a particular machine register.
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// The fifth function gives the reg class of the given RegType.
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//
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virtual int getRegType(unsigned regClassID, const Type* type) const = 0;
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virtual int getRegType(const LiveRange *LR) const = 0;
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virtual int getRegType(const Value *Val) const = 0;
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virtual int getRegType(int unifiedRegNum) const = 0;
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// The following methods are used to get the frame/stack pointers
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//
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virtual unsigned getFramePointer() const = 0;
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virtual unsigned getStackPointer() const = 0;
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// A register can be initialized to an invalid number. That number can
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// be obtained using this method.
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//
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virtual int getInvalidRegNum() const = 0;
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// Method for inserting caller saving code. The caller must save all the
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// volatile registers across a call based on the calling conventions of
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// an architecture. This must insert code for saving and restoring
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// such registers on
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//
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virtual void insertCallerSavingCode(std::vector<MachineInstr*>& instrnsBefore,
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std::vector<MachineInstr*>& instrnsAfter,
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MachineInstr *MInst,
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const BasicBlock *BB,
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PhyRegAlloc &PRA) const = 0;
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// This method gives the the number of bytes of stack spaceallocated
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// to a register when it is spilled to the stack.
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//
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virtual int getSpilledRegSize(int RegType) const = 0;
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};
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#endif
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