mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-07-25 14:30:32 +00:00
23125d02d9
This commit allows the ARM integrated assembler to parse and assemble the code with .eabi_attribute, .cpu, and .fpu directives. To implement the feature, this commit moves the code from AttrEmitter to ARMTargetStreamers, and several new test cases related to cortex-m4, cortex-r5, and cortex-a15 are added. Besides, this commit also change the Subtarget->isFPOnlySP() to Subtarget->hasD16() to match the usage of .fpu directive. This commit changes the test cases: * Several .eabi_attribute directives in 2010-09-29-mc-asm-header-test.ll are removed because the .fpu directive already cover the functionality. * In the Cortex-A15 test case, the value for Tag_Advanced_SIMD_arch has be changed from 1 to 2, which is more precise. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193524 91177308-0d34-0410-b5e6-96231b3b80d8
171 lines
6.1 KiB
LLVM
171 lines
6.1 KiB
LLVM
; This tests that MC/asm header conversion is smooth and that the
|
|
; build attributes are correct
|
|
|
|
; RUN: llc < %s -mtriple=armv6-linux-gnueabi | FileCheck %s --check-prefix=V6
|
|
; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi | FileCheck %s --check-prefix=V6M
|
|
; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s | FileCheck %s --check-prefix=ARM1156T2F-S
|
|
; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi | FileCheck %s --check-prefix=V7M
|
|
; RUN: llc < %s -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=V7
|
|
; RUN: llc < %s -mtriple=armv8-linux-gnueabi | FileCheck %s --check-prefix=V8
|
|
; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi | FileCheck %s --check-prefix=Vt8
|
|
; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-neon,-crypto | FileCheck %s --check-prefix=V8-FPARMv8
|
|
; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-fp-armv8,-crypto | FileCheck %s --check-prefix=V8-NEON
|
|
; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-crypto | FileCheck %s --check-prefix=V8-FPARMv8-NEON
|
|
; RUN: llc < %s -mtriple=armv8-linux-gnueabi | FileCheck %s --check-prefix=V8-FPARMv8-NEON-CRYPTO
|
|
; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 | FileCheck %s --check-prefix=CORTEX-A9
|
|
; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 | FileCheck %s --check-prefix=CORTEX-A15
|
|
; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 | FileCheck %s --check-prefix=CORTEX-M0
|
|
; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 | FileCheck %s --check-prefix=CORTEX-M4
|
|
; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 | FileCheck %s --check-prefix=CORTEX-R5
|
|
; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 | FileCheck %s --check-prefix=CORTEX-A53
|
|
; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 | FileCheck %s --check-prefix=CORTEX-A57
|
|
|
|
; V6: .eabi_attribute 6, 6
|
|
; V6: .eabi_attribute 8, 1
|
|
; V6: .eabi_attribute 24, 1
|
|
; V6: .eabi_attribute 25, 1
|
|
|
|
; V6M: .eabi_attribute 6, 12
|
|
; V6M: .eabi_attribute 7, 77
|
|
; V6M: .eabi_attribute 8, 0
|
|
; V6M: .eabi_attribute 9, 1
|
|
; V6M: .eabi_attribute 24, 1
|
|
; V6M: .eabi_attribute 25, 1
|
|
|
|
; ARM1156T2F-S: .cpu arm1156t2f-s
|
|
; ARM1156T2F-S: .eabi_attribute 6, 8
|
|
; ARM1156T2F-S: .eabi_attribute 8, 1
|
|
; ARM1156T2F-S: .eabi_attribute 9, 2
|
|
; ARM1156T2F-S: .fpu vfpv2
|
|
; ARM1156T2F-S: .eabi_attribute 20, 1
|
|
; ARM1156T2F-S: .eabi_attribute 21, 1
|
|
; ARM1156T2F-S: .eabi_attribute 23, 3
|
|
; ARM1156T2F-S: .eabi_attribute 24, 1
|
|
; ARM1156T2F-S: .eabi_attribute 25, 1
|
|
|
|
; V7M: .eabi_attribute 6, 10
|
|
; V7M: .eabi_attribute 7, 77
|
|
; V7M: .eabi_attribute 8, 0
|
|
; V7M: .eabi_attribute 9, 2
|
|
; V7M: .eabi_attribute 24, 1
|
|
; V7M: .eabi_attribute 25, 1
|
|
; V7M: .eabi_attribute 44, 0
|
|
|
|
; V7: .syntax unified
|
|
; V7: .eabi_attribute 6, 10
|
|
; V7: .eabi_attribute 20, 1
|
|
; V7: .eabi_attribute 21, 1
|
|
; V7: .eabi_attribute 23, 3
|
|
; V7: .eabi_attribute 24, 1
|
|
; V7: .eabi_attribute 25, 1
|
|
|
|
; V8: .syntax unified
|
|
; V8: .eabi_attribute 6, 14
|
|
|
|
; Vt8: .syntax unified
|
|
; Vt8: .eabi_attribute 6, 14
|
|
|
|
; V8-FPARMv8: .syntax unified
|
|
; V8-FPARMv8: .eabi_attribute 6, 14
|
|
; V8-FPARMv8: .fpu fp-armv8
|
|
|
|
; V8-NEON: .syntax unified
|
|
; V8-NEON: .eabi_attribute 6, 14
|
|
; V8-NEON: .fpu neon
|
|
; V8-NEON: .eabi_attribute 12, 3
|
|
|
|
; V8-FPARMv8-NEON: .syntax unified
|
|
; V8-FPARMv8-NEON: .eabi_attribute 6, 14
|
|
; V8-FPARMv8-NEON: .fpu neon-fp-armv8
|
|
; V8-FPARMv8-NEON: .eabi_attribute 12, 3
|
|
|
|
; V8-FPARMv8-NEON-CRYPTO: .syntax unified
|
|
; V8-FPARMv8-NEON-CRYPTO: .eabi_attribute 6, 14
|
|
; V8-FPARMv8-NEON-CRYPTO: .fpu crypto-neon-fp-armv8
|
|
; V8-FPARMv8-NEON-CRYPTO: .eabi_attribute 12, 3
|
|
|
|
; CORTEX-A9: .cpu cortex-a9
|
|
; CORTEX-A9: .eabi_attribute 6, 10
|
|
; CORTEX-A9: .eabi_attribute 7, 65
|
|
; CORTEX-A9: .eabi_attribute 8, 1
|
|
; CORTEX-A9: .eabi_attribute 9, 2
|
|
; CORTEX-A9: .fpu neon
|
|
; CORTEX-A9: .eabi_attribute 20, 1
|
|
; CORTEX-A9: .eabi_attribute 21, 1
|
|
; CORTEX-A9: .eabi_attribute 23, 3
|
|
; CORTEX-A9: .eabi_attribute 24, 1
|
|
; CORTEX-A9: .eabi_attribute 25, 1
|
|
|
|
; CORTEX-A15: .cpu cortex-a15
|
|
; CORTEX-A15: .eabi_attribute 6, 10
|
|
; CORTEX-A15: .eabi_attribute 7, 65
|
|
; CORTEX-A15: .eabi_attribute 8, 1
|
|
; CORTEX-A15: .eabi_attribute 9, 2
|
|
; CORTEX-A15: .fpu neon-vfpv4
|
|
; CORTEX-A15: .eabi_attribute 20, 1
|
|
; CORTEX-A15: .eabi_attribute 21, 1
|
|
; CORTEX-A15: .eabi_attribute 23, 3
|
|
; CORTEX-A15: .eabi_attribute 24, 1
|
|
; CORTEX-A15: .eabi_attribute 25, 1
|
|
; CORTEX-A15: .eabi_attribute 44, 2
|
|
|
|
; CORTEX-M0: .cpu cortex-m0
|
|
; CORTEX-M0: .eabi_attribute 6, 12
|
|
; CORTEX-M0: .eabi_attribute 7, 77
|
|
; CORTEX-M0: .eabi_attribute 8, 0
|
|
; CORTEX-M0: .eabi_attribute 9, 1
|
|
; CORTEX-M0: .eabi_attribute 24, 1
|
|
; CORTEX-M0: .eabi_attribute 25, 1
|
|
|
|
; CORTEX-M4: .cpu cortex-m4
|
|
; CORTEX-M4: .eabi_attribute 6, 13
|
|
; CORTEX-M4: .eabi_attribute 7, 77
|
|
; CORTEX-M4: .eabi_attribute 8, 0
|
|
; CORTEX-M4: .eabi_attribute 9, 2
|
|
; CORTEX-M4: .fpu vfpv4-d16
|
|
; CORTEX-M4: .eabi_attribute 20, 1
|
|
; CORTEX-M4: .eabi_attribute 21, 1
|
|
; CORTEX-M4: .eabi_attribute 23, 3
|
|
; CORTEX-M4: .eabi_attribute 24, 1
|
|
; CORTEX-M4: .eabi_attribute 25, 1
|
|
; CORTEX-M4: .eabi_attribute 44, 0
|
|
|
|
; CORTEX-R5: .cpu cortex-r5
|
|
; CORTEX-R5: .eabi_attribute 6, 10
|
|
; CORTEX-R5: .eabi_attribute 7, 82
|
|
; CORTEX-R5: .eabi_attribute 8, 1
|
|
; CORTEX-R5: .eabi_attribute 9, 2
|
|
; CORTEX-R5: .fpu vfpv3-d16
|
|
; CORTEX-R5: .eabi_attribute 20, 1
|
|
; CORTEX-R5: .eabi_attribute 21, 1
|
|
; CORTEX-R5: .eabi_attribute 23, 3
|
|
; CORTEX-R5: .eabi_attribute 24, 1
|
|
; CORTEX-R5: .eabi_attribute 25, 1
|
|
; CORTEX-R5: .eabi_attribute 44, 2
|
|
|
|
; CORTEX-A53: .cpu cortex-a53
|
|
; CORTEX-A53: .eabi_attribute 6, 14
|
|
; CORTEX-A53: .eabi_attribute 7, 65
|
|
; CORTEX-A53: .eabi_attribute 8, 1
|
|
; CORTEX-A53: .eabi_attribute 9, 2
|
|
; CORTEX-A53: .fpu crypto-neon-fp-armv8
|
|
; CORTEX-A53: .eabi_attribute 12, 3
|
|
; CORTEX-A53: .eabi_attribute 24, 1
|
|
; CORTEX-A53: .eabi_attribute 25, 1
|
|
; CORTEX-A53: .eabi_attribute 44, 2
|
|
|
|
; CORTEX-A57: .cpu cortex-a57
|
|
; CORTEX-A57: .eabi_attribute 6, 14
|
|
; CORTEX-A57: .eabi_attribute 7, 65
|
|
; CORTEX-A57: .eabi_attribute 8, 1
|
|
; CORTEX-A57: .eabi_attribute 9, 2
|
|
; CORTEX-A57: .fpu crypto-neon-fp-armv8
|
|
; CORTEX-A57: .eabi_attribute 12, 3
|
|
; CORTEX-A57: .eabi_attribute 24, 1
|
|
; CORTEX-A57: .eabi_attribute 25, 1
|
|
; CORTEX-A57: .eabi_attribute 44, 2
|
|
|
|
define i32 @f(i64 %z) {
|
|
ret i32 0
|
|
}
|