mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-02-06 06:33:24 +00:00
2d0d7fd085
Introduce support for WoA PE/COFF object file emission from LLVM. Add the new target specific PE/COFF Streamer (ARMWinCOFFStreamer) that handles the ARM specific behaviour of PE/COFF object emission. ARM exception information is not yet emitted and is a TODO item. The ARM specific object writer (ARMWinCOFFObjectWriter) handles the ARM specific relocation handling in conjunction with the WinCOFFObjectWriter in the MC layer. The MC layer needs to be updated to deal with the relocation adjustments. Branch relocations are adjusted by 4 bytes (unlikely their ELF counterparts). Minor tweaks to switch multiple conditional checks into equivalent switch statements. The ObjectFileInfo is updated to relax the object file setup for Windows COFF. Move the architecture checks into an assertion. Windows COFF is currently only supported on x86, x86_64, and ARM (thumb). Rather than defaulting to ELF, we will refuse to generate an object file. This is better though as you do not get an (arbitrary) object file which is different from the request. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207345 91177308-0d34-0410-b5e6-96231b3b80d8
102 lines
2.1 KiB
ArmAsm
102 lines
2.1 KiB
ArmAsm
@ RUN: llvm-mc -triple thumbv7-windows-itanium -filetype obj -o - %s \
|
|
@ RUN: | llvm-readobj -r - | FileCheck %s -check-prefix CHECK-RELOCATION
|
|
|
|
@ RUN: llvm-mc -triple thumbv7-windows-itanium -filetype obj -o - %s \
|
|
@ RUN: | llvm-objdump -d - | FileCheck %s -check-prefix CHECK-ENCODING
|
|
|
|
.syntax unified
|
|
.text
|
|
.thumb
|
|
|
|
.global target
|
|
|
|
.thumb_func
|
|
branch24t:
|
|
b target
|
|
|
|
@ CHECK-ENCODING-LABEL: branch24t
|
|
@ CHECK-ENCODING-NEXT: b.w #0
|
|
|
|
.thumb_func
|
|
branch20t:
|
|
bcc target
|
|
|
|
@ CHECK-ENCODING-LABEL: branch20t
|
|
@ CHECK-ENCODING-NEXT: blo.w #0
|
|
|
|
.thumb_func
|
|
blx23t:
|
|
bl target
|
|
|
|
@ CHECK-ENCODING-LABEL: blx23t
|
|
@ CHECK-ENCODING-NEXT: bl #0
|
|
|
|
.thumb_func
|
|
mov32t:
|
|
movw r0, :lower16:target
|
|
movt r0, :upper16:target
|
|
blx r0
|
|
|
|
@ CHECK-ENCODING-LABEL: mov32t
|
|
@ CHECK-ENCODING-NEXT: movw r0, #0
|
|
@ CHECK-ENCODING-NEXT: movt r0, #0
|
|
@ CHECK-ENCODING-NEXT: blx r0
|
|
|
|
.thumb_func
|
|
addr32:
|
|
ldr r0, .Laddr32
|
|
bx r0
|
|
trap
|
|
.Laddr32:
|
|
.long target
|
|
|
|
@ CHECK-ENCODING-LABEL: addr32
|
|
@ CHECK-ENCODING-NEXT: ldr r0, [pc, #4]
|
|
@ CHECK-ENCODING-NEXT: bx r0
|
|
@ CHECK-ENCODING-NEXT: trap
|
|
@ CHECK-ENCODING-NEXT: movs r0, r0
|
|
@ CHECK-ENCODING-NEXT: movs r0, r0
|
|
|
|
.thumb_func
|
|
addr32nb:
|
|
ldr r0, .Laddr32nb
|
|
bx r0
|
|
trap
|
|
.Laddr32nb:
|
|
.long target(imgrel)
|
|
|
|
@ CHECK-ENCODING-LABEL: addr32nb
|
|
@ CHECK-ENCODING-NEXT: ldr.w r0, [pc, #4]
|
|
@ CHECK-ENCODING-NEXT: bx r0
|
|
@ CHECK-ENCODING-NEXT: trap
|
|
@ CHECK-ENCODING-NEXT: movs r0, r0
|
|
@ CHECK-ENCODING-NEXT: movs r0, r0
|
|
|
|
.thumb_func
|
|
secrel:
|
|
ldr r0, .Lsecrel
|
|
bx r0
|
|
trap
|
|
.Lsecrel:
|
|
.long target(secrel32)
|
|
|
|
@ CHECK-ENCODING-LABEL: secrel
|
|
@ CHECK-ENCODING-NEXT: ldr.w r0, [pc, #4]
|
|
@ CHECK-ENCODING-NEXT: bx r0
|
|
@ CHECK-ENCODING-NEXT: trap
|
|
@ CHECK-ENCODING-NEXT: movs r0, r0
|
|
@ CHECK-ENCODING-NEXT: movs r0, r0
|
|
|
|
@ CHECK-RELOCATION: Relocations [
|
|
@ CHECK-RELOCATION: Section (1) .text {
|
|
@ CHCEK-RELOCATION: 0x0 IMAGE_REL_ARM_BRANCH24T
|
|
@ CHECK-RELOCATION: 0x4 IMAGE_REL_ARM_BRANCH20T
|
|
@ CHECK-RELOCATION: 0x8 IMAGE_REL_ARM_BLX23T
|
|
@ CHECK-RELOCATION: 0xC IMAGE_REL_ARM_MOV32T
|
|
@ CHECK-RELOCATION: 0x1C IMAGE_REL_ARM_ADDR32
|
|
@ CHECK-RELOCATION: 0x28 IMAGE_REL_ARM_ADDR32NB
|
|
@ CHECK-RELOCATION: 0x34 IMAGE_REL_ARM_SECREL
|
|
@ CHECK-RELOCATION: }
|
|
@ CHECK-RELOCATION: ]
|
|
|