Pete Cooper 2d49689793 Added custom lowering for load->dec->store sequence in x86 when the EFLAGS registers is used ... by later instructions. Only done for DEC64m right now. Fixes <rdar://problem/6172640> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144705 91177308-0d34-0410-b5e6-96231b3b80d8		2011-11-15 21:57:53 +00:00
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Analysis	Don't forget to check FlagNW when determining whether an AddRecExpr will wrap	2011-11-09 07:11:37 +00:00
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CodeGen	Added custom lowering for load->dec->store sequence in x86 when the EFLAGS registers is used	2011-11-15 21:57:53 +00:00
DebugInfo	The dwarf standard says that the only differences between a out-of-line	2011-11-12 01:57:54 +00:00
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MC	ARM alternate size suffices for VTRN instructions.	2011-11-15 20:49:46 +00:00
Object	Move x86-specific tests into X86 folder.	2011-11-01 03:21:48 +00:00
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Transforms	Refactor capture tracking (which already had a couple flags for whether returns	2011-11-14 22:49:42 +00:00
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CMakeLists.txt	build/cmake: Change to require Python be available.	2011-11-04 23:04:05 +00:00
lit.cfg	Update lit's list of tools.	2011-11-05 16:20:52 +00:00
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