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https://github.com/c64scene-ar/llvm-6502.git
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85e08ed8a4
This patch adds functionality in MIPS delay slot filler such as if delay slot filler have to put NOP instruction into the delay slot of microMIPS JR instruction, then instead of emitting NOP this instruction is replaced by compact jump instruction JRC. Differential Revision: http://reviews.llvm.org/D7522 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229128 91177308-0d34-0410-b5e6-96231b3b80d8
47 lines
1.6 KiB
LLVM
47 lines
1.6 KiB
LLVM
; RUN: llc -march=mipsel -mcpu=mips32r2 -mattr=+micromips \
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; RUN: -relocation-model=static -O2 < %s | FileCheck %s
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@main.L = internal unnamed_addr constant [3 x i8*] [i8* blockaddress(@main, %L1), i8* blockaddress(@main, %L2), i8* null], align 4
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@str = private unnamed_addr constant [2 x i8] c"A\00"
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@str2 = private unnamed_addr constant [2 x i8] c"B\00"
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define i32 @main() #0 {
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entry:
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br label %L1
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L1: ; preds = %entry, %L1
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%i.0 = phi i32 [ 0, %entry ], [ %inc, %L1 ]
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%puts = tail call i32 @puts(i8* getelementptr inbounds ([2 x i8]* @str, i32 0, i32 0))
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%inc = add i32 %i.0, 1
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%arrayidx = getelementptr inbounds [3 x i8*]* @main.L, i32 0, i32 %i.0
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%0 = load i8** %arrayidx, align 4, !tbaa !1
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indirectbr i8* %0, [label %L1, label %L2]
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L2: ; preds = %L1
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%puts2 = tail call i32 @puts(i8* getelementptr inbounds ([2 x i8]* @str2, i32 0, i32 0))
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ret i32 0
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}
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declare i32 @puts(i8* nocapture readonly) #1
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!1 = !{!2, !2, i64 0}
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!2 = !{!"any pointer", !3, i64 0}
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!3 = !{!"omnipotent char", !4, i64 0}
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!4 = !{!"Simple C/C++ TBAA"}
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; CHECK: jrc
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%struct.foostruct = type { [3 x float] }
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%struct.barstruct = type { %struct.foostruct, float }
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@bar_ary = common global [4 x %struct.barstruct] zeroinitializer, align 4
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define float* @spooky(i32 signext %i) #0 {
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%safe = getelementptr inbounds [4 x %struct.barstruct]* @bar_ary, i32 0, i32 %i, i32 1
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store float 1.420000e+02, float* %safe, align 4, !tbaa !1
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ret float* %safe
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}
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; CHECK: spooky:
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; CHECK: jrc $ra
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