mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-04 07:29:20 +00:00
d50bcb2162
This patch adds support for the CRJ and CGRJ instructions. Support for the immediate forms will be a separate patch. The architecture has a large number of comparison instructions. I think it's generally better to concentrate on using the "best" comparison instruction first and foremost, then only use something like CRJ if CR really was the natual choice of comparison instruction. The patch therefore opportunistically converts separate CR and BRC instructions into a single CRJ while emitting instructions in ISelLowering. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182764 91177308-0d34-0410-b5e6-96231b3b80d8
141 lines
3.7 KiB
LLVM
141 lines
3.7 KiB
LLVM
; Test 64-bit atomic minimum and maximum.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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; Check signed minium.
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define i64 @f1(i64 %dummy, i64 *%src, i64 %b) {
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; CHECK: f1:
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; CHECK: lg %r2, 0(%r3)
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; CHECK: [[LOOP:\.[^:]*]]:
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; CHECK: lgr [[NEW:%r[0-9]+]], %r2
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; CHECK: cgrjle %r2, %r4, [[KEEP:\..*]]
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; CHECK: lgr [[NEW]], %r4
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; CHECK: csg %r2, [[NEW]], 0(%r3)
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; CHECK: jlh [[LOOP]]
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; CHECK: br %r14
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%res = atomicrmw min i64 *%src, i64 %b seq_cst
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ret i64 %res
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}
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; Check signed maximum.
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define i64 @f2(i64 %dummy, i64 *%src, i64 %b) {
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; CHECK: f2:
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; CHECK: lg %r2, 0(%r3)
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; CHECK: [[LOOP:\.[^:]*]]:
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; CHECK: lgr [[NEW:%r[0-9]+]], %r2
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; CHECK: cgrjhe %r2, %r4, [[KEEP:\..*]]
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; CHECK: lgr [[NEW]], %r4
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; CHECK: csg %r2, [[NEW]], 0(%r3)
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; CHECK: jlh [[LOOP]]
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; CHECK: br %r14
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%res = atomicrmw max i64 *%src, i64 %b seq_cst
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ret i64 %res
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}
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; Check unsigned minimum.
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define i64 @f3(i64 %dummy, i64 *%src, i64 %b) {
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; CHECK: f3:
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; CHECK: lg %r2, 0(%r3)
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; CHECK: [[LOOP:\.[^:]*]]:
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; CHECK: clgr %r2, %r4
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; CHECK: lgr [[NEW:%r[0-9]+]], %r2
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; CHECK: jle [[KEEP:\..*]]
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; CHECK: lgr [[NEW]], %r4
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; CHECK: csg %r2, [[NEW]], 0(%r3)
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; CHECK: jlh [[LOOP]]
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; CHECK: br %r14
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%res = atomicrmw umin i64 *%src, i64 %b seq_cst
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ret i64 %res
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}
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; Check unsigned maximum.
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define i64 @f4(i64 %dummy, i64 *%src, i64 %b) {
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; CHECK: f4:
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; CHECK: lg %r2, 0(%r3)
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; CHECK: [[LOOP:\.[^:]*]]:
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; CHECK: clgr %r2, %r4
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; CHECK: lgr [[NEW:%r[0-9]+]], %r2
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; CHECK: jhe [[KEEP:\..*]]
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; CHECK: lgr [[NEW]], %r4
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; CHECK: csg %r2, [[NEW]], 0(%r3)
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; CHECK: jlh [[LOOP]]
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; CHECK: br %r14
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%res = atomicrmw umax i64 *%src, i64 %b seq_cst
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ret i64 %res
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}
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; Check the high end of the aligned CSG range.
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define i64 @f5(i64 %dummy, i64 *%src, i64 %b) {
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; CHECK: f5:
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; CHECK: lg %r2, 524280(%r3)
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; CHECK: csg %r2, {{%r[0-9]+}}, 524280(%r3)
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; CHECK: br %r14
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%ptr = getelementptr i64 *%src, i64 65535
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%res = atomicrmw min i64 *%ptr, i64 %b seq_cst
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ret i64 %res
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}
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; Check the next doubleword up, which requires separate address logic.
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define i64 @f6(i64 %dummy, i64 *%src, i64 %b) {
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; CHECK: f6:
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; CHECK: agfi %r3, 524288
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; CHECK: lg %r2, 0(%r3)
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; CHECK: csg %r2, {{%r[0-9]+}}, 0(%r3)
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; CHECK: br %r14
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%ptr = getelementptr i64 *%src, i64 65536
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%res = atomicrmw min i64 *%ptr, i64 %b seq_cst
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ret i64 %res
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}
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; Check the low end of the CSG range.
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define i64 @f7(i64 %dummy, i64 *%src, i64 %b) {
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; CHECK: f7:
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; CHECK: lg %r2, -524288(%r3)
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; CHECK: csg %r2, {{%r[0-9]+}}, -524288(%r3)
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; CHECK: br %r14
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%ptr = getelementptr i64 *%src, i64 -65536
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%res = atomicrmw min i64 *%ptr, i64 %b seq_cst
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ret i64 %res
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}
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; Check the next doubleword down, which requires separate address logic.
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define i64 @f8(i64 %dummy, i64 *%src, i64 %b) {
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; CHECK: f8:
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; CHECK: agfi %r3, -524296
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; CHECK: lg %r2, 0(%r3)
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; CHECK: csg %r2, {{%r[0-9]+}}, 0(%r3)
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; CHECK: br %r14
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%ptr = getelementptr i64 *%src, i64 -65537
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%res = atomicrmw min i64 *%ptr, i64 %b seq_cst
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ret i64 %res
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}
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; Check that indexed addresses are not allowed.
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define i64 @f9(i64 %dummy, i64 %base, i64 %index, i64 %b) {
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; CHECK: f9:
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; CHECK: agr %r3, %r4
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; CHECK: lg %r2, 0(%r3)
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; CHECK: csg %r2, {{%r[0-9]+}}, 0(%r3)
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; CHECK: br %r14
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%add = add i64 %base, %index
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%ptr = inttoptr i64 %add to i64 *
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%res = atomicrmw min i64 *%ptr, i64 %b seq_cst
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ret i64 %res
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}
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; Check that constants are forced into a register.
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define i64 @f10(i64 %dummy, i64 *%ptr) {
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; CHECK: f10:
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; CHECK: lghi [[LIMIT:%r[0-9]+]], 42
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; CHECK: lg %r2, 0(%r3)
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; CHECK: [[LOOP:\.[^:]*]]:
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; CHECK: lgr [[NEW:%r[0-9]+]], %r2
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; CHECK: cgrjle %r2, [[LIMIT]], [[KEEP:\..*]]
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; CHECK: lgr [[NEW]], [[LIMIT]]
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; CHECK: csg %r2, [[NEW]], 0(%r3)
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; CHECK: jlh [[LOOP]]
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; CHECK: br %r14
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%res = atomicrmw min i64 *%ptr, i64 42 seq_cst
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ret i64 %res
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}
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