6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-10-01 10:57:21 +00:00
Code Issues Projects Releases Wiki Activity
2d9a799b16
llvm-6502/lib/Target/XCore
History
Eric Christopher acdd4442cb getRegForInlineAsmConstraint wants to use TargetRegisterInfo for 
a lookup, pass that in rather than use a naked call to getSubtargetImpl.
This involved passing down and around either a TargetMachine or
TargetRegisterInfo. Update all callers/definitions around the targets
and SelectionDAG.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230699 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-26 22:38:43 +00:00
..
Disassembler
InstPrinter
MCTargetDesc
TargetInfo
CMakeLists.txt
LLVMBuild.txt
Makefile
README.txt
XCore.h
XCore.td
XCoreAsmPrinter.cpp
XCoreCallingConv.td
XCoreFrameLowering.cpp
XCoreFrameLowering.h
XCoreFrameToArgsOffsetElim.cpp
XCoreInstrFormats.td
XCoreInstrInfo.cpp
XCoreInstrInfo.h
XCoreInstrInfo.td
XCoreISelDAGToDAG.cpp
XCoreISelLowering.cpp getRegForInlineAsmConstraint wants to use TargetRegisterInfo for 2015-02-26 22:38:43 +00:00
XCoreISelLowering.h getRegForInlineAsmConstraint wants to use TargetRegisterInfo for 2015-02-26 22:38:43 +00:00
XCoreLowerThreadLocal.cpp
XCoreMachineFunctionInfo.cpp
XCoreMachineFunctionInfo.h
XCoreMCInstLower.cpp
XCoreMCInstLower.h
XCoreRegisterInfo.cpp
XCoreRegisterInfo.h
XCoreRegisterInfo.td
XCoreSelectionDAGInfo.cpp
XCoreSelectionDAGInfo.h
XCoreSubtarget.cpp
XCoreSubtarget.h
XCoreTargetMachine.cpp
XCoreTargetMachine.h
XCoreTargetObjectFile.cpp
XCoreTargetObjectFile.h
XCoreTargetStreamer.h
XCoreTargetTransformInfo.h

README.txt 

To-do
-----

* Instruction encodings
* Tailcalls
* Investigate loop alignment
* Add builtins