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45a31492d5
inverted condition codes (CINC, CINV, CNEG, CSET, and CSETM). Matching aliases based on "immediate classes", when disassembling, wasn't previously supported, hence adding MCOperandPredicate into class Operand, and implementing the support for it in AsmWriterEmitter. The parsing for those aliases was already custom, so just adding the missing condition into AArch64AsmParser::parseCondCode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210528 91177308-0d34-0410-b5e6-96231b3b80d8 |
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.. | ||
a64-ignored-fields.txt | ||
arm64-advsimd.txt | ||
arm64-arithmetic.txt | ||
arm64-basic-a64-undefined.txt | ||
arm64-bitfield.txt | ||
arm64-branch.txt | ||
arm64-canonical-form.txt | ||
arm64-crc32.txt | ||
arm64-crypto.txt | ||
arm64-invalid-logical.txt | ||
arm64-logical.txt | ||
arm64-memory.txt | ||
arm64-non-apple-fmov.txt | ||
arm64-scalar-fp.txt | ||
arm64-system.txt | ||
basic-a64-instructions.txt | ||
basic-a64-undefined.txt | ||
basic-a64-unpredictable.txt | ||
gicv3-regs.txt | ||
ldp-offset-predictable.txt | ||
ldp-postind.predictable.txt | ||
ldp-preind.predictable.txt | ||
lit.local.cfg | ||
neon-instructions.txt | ||
trace-regs.txt |