Benjamin Kramer 2dbe929685 X86: Enable SSE memory intrinsics even when stack alignment is less than 16 bytes. ...

The stack realignment code was fixed to work when there is stack realignment and
a dynamic alloca is present so this shouldn't cause correctness issues anymore.

Note that this also enables generation of AVX instructions for memset
under the assumptions:
- Unaligned loads/stores are always fast on CPUs supporting AVX
- AVX is not slower than SSE
We may need some tweaked heuristics if one of those assumptions turns out not to
be true.

Effectively reverts r58317. Part of PR2962.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167967 91177308-0d34-0410-b5e6-96231b3b80d8

2012-11-14 20:08:40 +00:00

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ARM

The code pattern "imm0_255_neg" is used for checking if an immediate value is a small negative number.

2012-11-14 19:39:15 +00:00

CellSPU

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CPP

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Generic

Codegen support for arbitrary vector getelementptrs.

2012-11-13 13:01:58 +00:00

Hexagon

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MBlaze

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Mips

[mips] Custom-lower ISD::FRAME_TO_ARGS_OFFSET node.

2012-11-07 19:10:58 +00:00

MSP430

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NVPTX

[NVPTX] Implement custom lowering of loads/stores for i1

2012-11-14 19:19:16 +00:00

PowerPC

Do not consider a machine instruction that uses and defines the same

2012-11-13 18:40:58 +00:00

SPARC

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Thumb

Convert an improper CodeGen test to a MC test.

2012-11-10 04:30:40 +00:00

Thumb2

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X86

X86: Enable SSE memory intrinsics even when stack alignment is less than 16 bytes.

2012-11-14 20:08:40 +00:00

XCore

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