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https://github.com/c64scene-ar/llvm-6502.git
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db31bd31d6
First, taking advantage of the fact that the virtual base registers are allocated in order of the local frame offsets, remove the quadratic register-searching behavior. Because of the ordering, we only need to check the last virtual base register created. Second, store the frame index in the FrameRef structure, and get the frame index and the local offset from this structure at the top of the loop iteration. This allows us to de-nest the loops in insertFrameReferenceRegisters (and I think makes the code cleaner). I also moved the needsFrameBaseReg check into the first loop over instructions so that we don't bother pushing FrameRefs for instructions that don't want a virtual base register anyway. Lastly, and this is the only functionality change, avoid the creation of single-use virtual base registers. These are currently not useful because, in general, they end up replacing what would be one r+r instruction with an add and a r+i instruction. Committing this removes the XFAIL in CodeGen/PowerPC/2007-09-07-LoadStoreIdxForms.ll Jim has okayed this off-list. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180799 91177308-0d34-0410-b5e6-96231b3b80d8
36 lines
736 B
LLVM
36 lines
736 B
LLVM
; RUN: llc < %s -mtriple=thumb-apple-ios | FileCheck %s
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define void @test1() {
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; CHECK: test1:
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; CHECK: sub sp, #256
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; CHECK: add sp, #256
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%tmp = alloca [ 64 x i32 ] , align 4
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ret void
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}
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define void @test2() {
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; CHECK: test2:
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; CHECK: ldr.n r0, LCPI
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; CHECK: add sp, r0
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; CHECK: subs r4, r7, #4
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; CHECK: mov sp, r4
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%tmp = alloca [ 4168 x i8 ] , align 4
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ret void
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}
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define i32 @test3() {
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; CHECK: test3:
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; CHECK: ldr.n r1, LCPI
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; CHECK: add sp, r1
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; CHECK: ldr.n r1, LCPI
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; CHECK: add r1, sp
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; CHECK: subs r4, r7, #4
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; CHECK: mov sp, r4
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%retval = alloca i32, align 4
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%tmp = alloca i32, align 4
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%a = alloca [805306369 x i8], align 16
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store i32 0, i32* %tmp
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%tmp1 = load i32* %tmp
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ret i32 %tmp1
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}
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