llvm-6502/test/Transforms/InstCombine/zext-bool-add-sub.ll
Rafael Espindola 2e1c072976 Revert "Add the nsw flag when we detect that an add will not signed overflow."
This reverts commit r210029.

It was not correctly handling cases where LHS and RHS had multiple but different
sign bits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210048 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-02 21:12:19 +00:00

17 lines
439 B
LLVM

; RUN: opt < %s -instcombine -S | FileCheck %s
; rdar://11748024
define i32 @a(i1 zeroext %x, i1 zeroext %y) {
entry:
; CHECK-LABEL: @a(
; CHECK: [[TMP1:%.*]] = sext i1 %y to i32
; CHECK: [[TMP2:%.*]] = select i1 %x, i32 2, i32 1
; CHECK-NEXT: add i32 [[TMP2]], [[TMP1]]
%conv = zext i1 %x to i32
%conv3 = zext i1 %y to i32
%conv3.neg = sub i32 0, %conv3
%sub = add i32 %conv, 1
%add = add i32 %sub, %conv3.neg
ret i32 %add
}