llvm-6502/test/CodeGen
Andrea Di Biagio 3583d23018 [X86][FastIsel] Teach how to select float-half conversion intrinsics.
This patch teaches X86FastISel how to select intrinsic 'convert_from_fp16' and
intrinsic 'convert_to_fp16'.
If the target has F16C, we can select VCVTPS2PHrr for a float-half conversion,
and VCVTPH2PSrr for a half-float conversion.

Differential Revision: http://reviews.llvm.org/D7673


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230043 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-20 19:37:14 +00:00
..
AArch64 AArch64: Safely handle the incoming sret call argument. 2015-02-16 18:10:47 +00:00
ARM [ARM] Re-re-apply VLD1/VST1 base-update combine. 2015-02-19 23:52:41 +00:00
BPF
CPP
Generic
Hexagon
Inputs
Mips Revert r229944: EH: Prune unreachable resume instructions during Dwarf EH preparation 2015-02-20 02:15:36 +00:00
MSP430
NVPTX
PowerPC I incorrectly marked the VORC instruction as isCommutable when I added it. 2015-02-20 15:54:58 +00:00
R600 R600/SI: Add missing offset operand to buffer bothen 2015-02-18 02:04:38 +00:00
SPARC SelectionDAG: fold (fp_to_u/sint (s/uint_to_fp)) here too 2015-02-16 21:47:58 +00:00
SystemZ [SystemZ] Support all TLS access models - CodeGen part 2015-02-18 09:13:27 +00:00
Thumb
Thumb2 Make buildbots better. 2015-02-11 12:24:09 +00:00
X86 [X86][FastIsel] Teach how to select float-half conversion intrinsics. 2015-02-20 19:37:14 +00:00
XCore Revert r229944: EH: Prune unreachable resume instructions during Dwarf EH preparation 2015-02-20 02:15:36 +00:00