mirror of
https://github.com/c64scene-ar/llvm-6502.git
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a23cc6a1ea
The fixes are to note that AArch64 has additional restrictions on when local relocations can be used. In particular, ld64 requires that relocations to cstring/cfstrings use linker visible symbols. Original message: In an assembly expression like bar: .long L0 + 1 the intended semantics is that bar will contain a pointer one byte past L0. In sections that are merged by content (strings, 4 byte constants, etc), a single position in the section doesn't give the linker enough information. For example, it would not be able to tell a relocation must point to the end of a string, since that would look just like the start of the next. The solution used in ELF to use relocation with symbols if there is a non-zero addend. In MachO before this patch we would just keep all symbols in some sections. This would miss some cases (only cstrings on x86_64 were implemented) and was inefficient since most relocations have an addend of 0 and can be represented without the symbol. This patch implements the non-zero addend logic for MachO too. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226503 91177308-0d34-0410-b5e6-96231b3b80d8
60 lines
1.7 KiB
ArmAsm
60 lines
1.7 KiB
ArmAsm
// RUN: llvm-mc -triple aarch64-apple-darwin14 %s -filetype=obj -o - | llvm-readobj -r --expand-relocs | FileCheck %s
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// Test that we "S + K" produce a relocation with a symbol, but just S produces
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// a relocation with the section.
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.section __TEXT,__literal4,4byte_literals
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L0:
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.long 42
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.section __TEXT,__cstring,cstring_literals
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L1:
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.asciz "42"
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.section __DATA,__data
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.quad L0
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.quad L0 + 1
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.quad L1
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.quad L1 + 1
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// CHECK: Relocations [
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// CHECK-NEXT: Section __data {
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// CHECK-NEXT: Relocation {
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// CHECK-NEXT: Offset: 0x18
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// CHECK-NEXT: PCRel: 0
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// CHECK-NEXT: Length: 3
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// CHECK-NEXT: Extern: 1
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// CHECK-NEXT: Type: ARM64_RELOC_UNSIGNED (0)
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// CHECK-NEXT: Symbol: L1
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// CHECK-NEXT: Scattered: 0
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// CHECK-NEXT: }
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// CHECK-NEXT: Relocation {
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// CHECK-NEXT: Offset: 0x10
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// CHECK-NEXT: PCRel: 0
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// CHECK-NEXT: Length: 3
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// CHECK-NEXT: Extern: 1
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// CHECK-NEXT: Type: ARM64_RELOC_UNSIGNED (0)
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// CHECK-NEXT: Symbol: L1
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// CHECK-NEXT: Scattered: 0
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// CHECK-NEXT: }
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// CHECK-NEXT: Relocation {
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// CHECK-NEXT: Offset: 0x8
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// CHECK-NEXT: PCRel: 0
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// CHECK-NEXT: Length: 3
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// CHECK-NEXT: Extern: 1
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// CHECK-NEXT: Type: ARM64_RELOC_UNSIGNED (0)
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// CHECK-NEXT: Symbol: L0
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// CHECK-NEXT: Scattered: 0
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// CHECK-NEXT: }
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// CHECK-NEXT: Relocation {
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// CHECK-NEXT: Offset: 0x0
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// CHECK-NEXT: PCRel: 0
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// CHECK-NEXT: Length: 3
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// CHECK-NEXT: Extern: 0
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// CHECK-NEXT: Type: ARM64_RELOC_UNSIGNED (0)
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// CHECK-NEXT: Symbol: 0x2
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// CHECK-NEXT: Scattered: 0
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// CHECK-NEXT: }
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// CHECK-NEXT: }
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// CHECK-NEXT: ]
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