Akira Hatanaka f2f2ef70a0 [AArch64InstPrinter] Use the feature bits of the subtarget passed to the print ... method. This enables the instprinter to print a different system register name based on the feature bits of the per-function subtarget. Differential Revision: http://reviews.llvm.org/D8668 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233412 91177308-0d34-0410-b5e6-96231b3b80d8		2015-03-27 20:37:20 +00:00
..
AsmParser	[AArch64] Don't store available subtarget features in AArch64SysReg::SysRegMapper	2015-03-27 17:11:29 +00:00
Disassembler
InstPrinter	[AArch64InstPrinter] Use the feature bits of the subtarget passed to the print	2015-03-27 20:37:20 +00:00
MCTargetDesc	AArch64: use a different means to determine whether to byte swap relocations.	2015-03-24 21:47:03 +00:00
TargetInfo
Utils	[AArch64] Don't store available subtarget features in AArch64SysReg::SysRegMapper	2015-03-27 17:11:29 +00:00
AArch64.h
AArch64.td	[MCInstPrinter] Enable MCInstPrinter to change its behavior based on the	2015-03-27 20:36:02 +00:00
AArch64A53Fix835769.cpp	Purge unused includes throughout libSupport.	2015-03-23 18:07:13 +00:00
AArch64A57FPLoadBalancing.cpp	unique_ptrs are unique already, no need to unique them any further.	2015-03-13 16:59:29 +00:00
AArch64AddressTypePromotion.cpp	Re-sort includes with sort-includes.py and insert raw_ostream.h where it's used.	2015-03-23 19:32:43 +00:00
AArch64AdvSIMDScalarPass.cpp
AArch64AsmPrinter.cpp	Re-sort includes with sort-includes.py and insert raw_ostream.h where it's used.	2015-03-23 19:32:43 +00:00
AArch64BranchRelaxation.cpp
AArch64CallingConvention.h
AArch64CallingConvention.td
AArch64CleanupLocalDynamicTLSPass.cpp	Fix PR22408 - LLVM producing AArch64 TLS relocations that GNU linkers cannot handle yet.	2015-03-04 09:12:08 +00:00
AArch64CollectLOH.cpp	Constify AArch64CollectLOH.cpp. NFC	2015-03-11 21:40:25 +00:00
AArch64ConditionalCompares.cpp
AArch64ConditionOptimizer.cpp
AArch64DeadRegisterDefinitionsPass.cpp
AArch64ExpandPseudoInsts.cpp
AArch64FastISel.cpp	Refactor: Simplify boolean expressions in AArch64 target	2015-03-24 16:24:01 +00:00
AArch64FrameLowering.cpp
AArch64FrameLowering.h
AArch64InstrAtomics.td
AArch64InstrFormats.td
AArch64InstrInfo.cpp	Revert "Migrate the AArch64 TargetRegisterInfo to its TargetMachine"	2015-03-18 20:37:30 +00:00
AArch64InstrInfo.h	Revert "Migrate the AArch64 TargetRegisterInfo to its TargetMachine"	2015-03-18 20:37:30 +00:00
AArch64InstrInfo.td	[AArch64, ARM] Add v8.1a architecture and generic cpu	2015-03-26 17:05:54 +00:00
AArch64ISelDAGToDAG.cpp	Move private classes into anonymous namespaces	2015-03-23 12:30:58 +00:00
AArch64ISelLowering.cpp	Refactor: Simplify boolean expressions in AArch64 target	2015-03-24 16:24:01 +00:00
AArch64ISelLowering.h	[aarch64] Distinguish the 'Q' and 'm' inline assembly memory constraints.	2015-03-23 11:33:15 +00:00
AArch64LoadStoreOptimizer.cpp	[AArch64][LoadStoreOptimizer] Generate LDP + SXTW instead of LD[U]R + LD[U]RSW.	2015-03-06 22:42:10 +00:00
AArch64MachineCombinerPattern.h
AArch64MachineFunctionInfo.h
AArch64MCInstLower.cpp	Fix PR22408 - LLVM producing AArch64 TLS relocations that GNU linkers cannot handle yet.	2015-03-04 09:12:08 +00:00
AArch64MCInstLower.h
AArch64PBQPRegAlloc.cpp	Avoid copying LiveInterval, this could lead to a double-delete	2015-03-03 22:25:48 +00:00
AArch64PBQPRegAlloc.h
AArch64PerfectShuffle.h
AArch64PromoteConstant.cpp	Re-sort includes with sort-includes.py and insert raw_ostream.h where it's used.	2015-03-23 19:32:43 +00:00
AArch64RegisterInfo.cpp	[ARM] Fix handling of thumb1 out-of-range frame offsets	2015-03-20 17:20:07 +00:00
AArch64RegisterInfo.h	[ARM] Fix handling of thumb1 out-of-range frame offsets	2015-03-20 17:20:07 +00:00
AArch64RegisterInfo.td
AArch64SchedA53.td
AArch64SchedA57.td
AArch64SchedA57WriteRes.td
AArch64SchedCyclone.td
AArch64Schedule.td
AArch64SelectionDAGInfo.cpp
AArch64SelectionDAGInfo.h
AArch64StorePairSuppress.cpp
AArch64Subtarget.cpp	[AArch64, ARM] Add v8.1a architecture and generic cpu	2015-03-26 17:05:54 +00:00
AArch64Subtarget.h	[AArch64, ARM] Add v8.1a architecture and generic cpu	2015-03-26 17:05:54 +00:00
AArch64TargetMachine.cpp	[AArch64, ARM] Enable GlobalMerge with -O3 rather than -O1.	2015-03-23 21:17:36 +00:00
AArch64TargetMachine.h	Remove the bare getSubtargetImpl call from the AArch64 port. As part	2015-03-21 04:04:50 +00:00
AArch64TargetObjectFile.cpp	[AsmPrinter][TLOF] 32-bit MachO support for replacing GOT equivalents	2015-03-06 13:49:05 +00:00
AArch64TargetObjectFile.h	[AsmPrinter][TLOF] 32-bit MachO support for replacing GOT equivalents	2015-03-06 13:49:05 +00:00
AArch64TargetTransformInfo.cpp	[AArch64] Enable partial & runtime unrolling on cortex-a57	2015-03-09 06:14:28 +00:00
AArch64TargetTransformInfo.h
CMakeLists.txt
LLVMBuild.txt
Makefile