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llvm-6502/lib/Target/Mips/MCTargetDesc/MipsReginfo.cpp
Jack Carter c91cbb9b0c This is a resubmittal. For some reason it broke the bots yesterday
but I cannot reproduce the problem and have scrubed my sources and
even tested with llvm-lit -v --vg.
Support for Mips register information sections.

Mips ELF object files have a section that is dedicated
to register use info. Some of this information such as
the assumed Global Pointer value is used by the linker
in relocation resolution.

The register info file is .reginfo in o32 and .MIPS.options
in 64 and n32 abi files.

This patch contains the changes needed to create the sections,
but leaves the actual register accounting for a future patch.


Contributer: Jack Carter
 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172847 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-18 21:20:38 +00:00

81 lines
2.4 KiB
C++

//===-- MipsReginfo.cpp - Registerinfo handling --------------------------===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
// .reginfo
// Elf32_Word ri_gprmask
// Elf32_Word ri_cprmask[4]
// Elf32_Word ri_gp_value
//
// .MIPS.options - N64
// Elf64_Byte kind (ODK_REGINFO)
// Elf64_Byte size (40 bytes)
// Elf64_Section section (0)
// Elf64_Word info (unused)
// Elf64_Word ri_gprmask ()
// Elf64_Word ri_pad ()
// Elf64_Word[4] ri_cprmask ()
// Elf64_Addr ri_gp_value ()
//
// .MIPS.options - N32
// Elf32_Byte kind (ODK_REGINFO)
// Elf32_Byte size (36 bytes)
// Elf32_Section section (0)
// Elf32_Word info (unused)
// Elf32_Word ri_gprmask ()
// Elf32_Word ri_pad ()
// Elf32_Word[4] ri_cprmask ()
// Elf32_Addr ri_gp_value ()
//
//===----------------------------------------------------------------------===//
#include "MCTargetDesc/MipsReginfo.h"
#include "MipsSubtarget.h"
#include "MipsTargetObjectFile.h"
#include "llvm/MC/MCStreamer.h"
using namespace llvm;
// Integrated assembler version
void
MipsReginfo::emitMipsReginfoSectionCG(MCStreamer &OS,
const TargetLoweringObjectFile &TLOF,
const MipsSubtarget &MST) const
{
if (OS.hasRawTextSupport())
return;
const MipsTargetObjectFile &TLOFELF =
static_cast<const MipsTargetObjectFile &>(TLOF);
OS.SwitchSection(TLOFELF.getReginfoSection());
// .reginfo
if (MST.isABI_O32()) {
OS.EmitIntValue(0, 4); // ri_gprmask
OS.EmitIntValue(0, 4); // ri_cpr[0]mask
OS.EmitIntValue(0, 4); // ri_cpr[1]mask
OS.EmitIntValue(0, 4); // ri_cpr[2]mask
OS.EmitIntValue(0, 4); // ri_cpr[3]mask
OS.EmitIntValue(0, 4); // ri_gp_value
}
// .MIPS.options
else if (MST.isABI_N64()) {
OS.EmitIntValue(1, 1); // kind
OS.EmitIntValue(40, 1); // size
OS.EmitIntValue(0, 2); // section
OS.EmitIntValue(0, 4); // info
OS.EmitIntValue(0, 4); // ri_gprmask
OS.EmitIntValue(0, 4); // pad
OS.EmitIntValue(0, 4); // ri_cpr[0]mask
OS.EmitIntValue(0, 4); // ri_cpr[1]mask
OS.EmitIntValue(0, 4); // ri_cpr[2]mask
OS.EmitIntValue(0, 4); // ri_cpr[3]mask
OS.EmitIntValue(0, 8); // ri_gp_value
}
else llvm_unreachable("Unsupported abi for reginfo");
}