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https://github.com/c64scene-ar/llvm-6502.git
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929bdb2379
By default, the behavior of IT block generation will be determinated dynamically base on the arch (armv8 vs armv7). This patch adds backend options: -arm-restrict-it and -arm-no-restrict-it. The former one restricts the generation of IT blocks (the same behavior as thumbv8) for both arches. The later one allows the generation of legacy IT block (the same behavior as ARMv7 Thumb2) for both arches. Clang will support -mrestrict-it and -mno-restrict-it, which is compatible with GCC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194592 91177308-0d34-0410-b5e6-96231b3b80d8
34 lines
1.2 KiB
LLVM
34 lines
1.2 KiB
LLVM
; RUN: llc < %s -mtriple=thumbv7-apple-darwin | FileCheck %s
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; RUN: llc < %s -mtriple=thumbv7-apple-darwin -arm-default-it | FileCheck %s
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; RUN: llc < %s -mtriple=thumbv8-apple-darwin -arm-no-restrict-it | FileCheck %s
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; There shouldn't be a unconditional branch at end of bb52.
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; rdar://7184787
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@posed = external global i64 ; <i64*> [#uses=1]
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define i1 @ab_bb52(i64 %.reload78, i64* %.out, i64* %.out1) nounwind {
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newFuncRoot:
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br label %bb52
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bb52.bb55_crit_edge.exitStub: ; preds = %bb52
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store i64 %0, i64* %.out
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store i64 %2, i64* %.out1
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ret i1 true
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bb52.bb53_crit_edge.exitStub: ; preds = %bb52
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store i64 %0, i64* %.out
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store i64 %2, i64* %.out1
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ret i1 false
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bb52: ; preds = %newFuncRoot
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; CHECK: movne
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; CHECK: moveq
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; CHECK: pop
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%0 = load i64* @posed, align 4 ; <i64> [#uses=3]
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%1 = sub i64 %0, %.reload78 ; <i64> [#uses=1]
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%2 = ashr i64 %1, 1 ; <i64> [#uses=3]
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%3 = icmp eq i64 %2, 0 ; <i1> [#uses=1]
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br i1 %3, label %bb52.bb55_crit_edge.exitStub, label %bb52.bb53_crit_edge.exitStub
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}
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