Ulrich Weigand d999062f31 Handle tied sub-operands in AsmMatcherEmitter ... The problem this patch addresses is the handling of register tie constraints in AsmMatcherEmitter, where one operand is tied to a sub-operand of another operand. The typical scenario for this to happen is the tie between the "write-back" register of a pre-inc instruction, and the base register sub-operand of the memory address operand of that instruction. The current AsmMatcherEmitter code attempts to handle tied operands by emitting the operand as usual first, and emitting a CVT_Tied node when handling the second (tied) operand. However, this really only works correctly if the tied operand does not have sub-operands (and isn't a sub-operand itself). Under those circumstances, a wrong MC operand list is generated. In discussions with Jim Grosbach, it turned out that the MC operand list really ought not to contain tied operands in the first place; instead, it ought to consist of exactly those operands that are named in the AsmString. However, getting there requires significant rework of (some) targets. This patch fixes the immediate problem, and at the same time makes one (small) step in the direction of the long-term solution, by implementing two changes: 1. Restricts the AsmMatcherEmitter handling of tied operands to apply solely to simple operands (not complex operands or sub-operand of such). This means that at least we don't get silently corrupt MC operand lists as output. However, if we do have tied sub-operands, they would now no longer be handled at all, except for: 2. If we have an operand that does not occur in the AsmString, and also isn't handled as tied operand, simply emit a dummy MC operand (constant 0). This works as long as target code never attempts to access MC operands that do no not occur in the AsmString (and are not tied simple operands), which happens to be the case for all targets where this situation can occur (ARM and PowerPC). [ Note that this change means that many of the ARM custom converters are now superfluous, since the implement the same "hack" now performed already by common code. ] Longer term, we ought to fix targets to never access *any* MC operand that does not occur in the AsmString (including tied simple operands), and then finally completely remove all such operands from the MC operand list. Patch approved by Jim Grosbach. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180677 91177308-0d34-0410-b5e6-96231b3b80d8		2013-04-27 18:48:23 +00:00
..
AsmMatcherEmitter.cpp	Handle tied sub-operands in AsmMatcherEmitter	2013-04-27 18:48:23 +00:00
AsmWriterEmitter.cpp
AsmWriterInst.cpp
AsmWriterInst.h
CallingConvEmitter.cpp
CMakeLists.txt
CodeEmitterGen.cpp
CodeGenDAGPatterns.cpp
CodeGenDAGPatterns.h
CodeGenInstruction.cpp
CodeGenInstruction.h
CodeGenIntrinsics.h
CodeGenMapTable.cpp
CodeGenRegisters.cpp
CodeGenRegisters.h
CodeGenSchedule.cpp	Machine model: verify well-formed processor resource groups.	2013-04-23 23:45:14 +00:00
CodeGenSchedule.h	Machine model: verify well-formed processor resource groups.	2013-04-23 23:45:14 +00:00
CodeGenTarget.cpp
CodeGenTarget.h
CTagsEmitter.cpp
DAGISelEmitter.cpp
DAGISelMatcher.cpp
DAGISelMatcher.h
DAGISelMatcherEmitter.cpp
DAGISelMatcherGen.cpp
DAGISelMatcherOpt.cpp
DFAPacketizerEmitter.cpp
DisassemblerEmitter.cpp
FastISelEmitter.cpp
FixedLenDecoderEmitter.cpp
InstrInfoEmitter.cpp
IntrinsicEmitter.cpp
LLVMBuild.txt
Makefile
OptParserEmitter.cpp
PseudoLoweringEmitter.cpp
RegisterInfoEmitter.cpp
SequenceToOffsetTable.h
SetTheory.cpp
SetTheory.h
StringToOffsetTable.h
SubtargetEmitter.cpp	Machine model: Generate table entries for super-resources.	2013-04-23 23:45:16 +00:00
TableGen.cpp
TableGenBackends.h
tdtags
TGValueTypes.cpp
X86DisassemblerShared.h
X86DisassemblerTables.cpp
X86DisassemblerTables.h
X86ModRMFilters.cpp
X86ModRMFilters.h
X86RecognizableInstr.cpp	Add CLAC/STAC instruction encoding/decoding support	2013-04-11 04:52:28 +00:00
X86RecognizableInstr.h