Juergen Ributzka 301d3d04f0 [FastISel][AArch64] Teach the address computation code to also fold sign-/zero-extends. ... The code already folds sign-/zero-extends, but only if they are arguments to mul and shift instructions. This extends the code to also fold them when they are direct inputs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219187 91177308-0d34-0410-b5e6-96231b3b80d8		2014-10-07 03:40:06 +00:00
..
Analysis	[BasicAA] Revert "Revert r218714 - Make better use of zext and sign information."	2014-10-06 18:37:59 +00:00
AsmParser
Bitcode
CodeGen	[DAGCombine] Remove SIGN_EXTEND-related inf-loop	2014-10-06 20:19:47 +00:00
DebugInfo
ExecutionEngine
IR
IRReader
LineEditor
Linker
LTO
MC
Object
Option
ProfileData
Support	Support: Add a utility to remap std{in,out,err} to /dev/null if closed	2014-10-06 23:16:18 +00:00
TableGen
Target	[FastISel][AArch64] Teach the address computation code to also fold sign-/zero-extends.	2014-10-07 03:40:06 +00:00
Transforms	[InstCombine] re-commit r218721 icmp-select-icmp optimization	2014-10-07 00:16:12 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile