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https://github.com/c64scene-ar/llvm-6502.git
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1b747ad8a0
and short. Well, it's kinda short. Definitely nasty and brutish. The front-end generates the register/unregister calls into the SjLj runtime, call-site indices and landing pad dispatch. The back end fills in the LSDA with the call-site information provided by the front end. Catch blocks are not yet implemented. Built on Darwin and verified no llvm-core "make check" regressions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78625 91177308-0d34-0410-b5e6-96231b3b80d8
73 lines
1.9 KiB
C++
73 lines
1.9 KiB
C++
//===-- ARMTargetAsmInfo.cpp - ARM asm properties ---------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the declarations of the ARMTargetAsmInfo properties.
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//
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//===----------------------------------------------------------------------===//
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#include "ARMTargetAsmInfo.h"
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using namespace llvm;
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const char *const llvm::arm_asm_table[] = {
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"{r0}", "r0",
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"{r1}", "r1",
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"{r2}", "r2",
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"{r3}", "r3",
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"{r4}", "r4",
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"{r5}", "r5",
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"{r6}", "r6",
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"{r7}", "r7",
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"{r8}", "r8",
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"{r9}", "r9",
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"{r10}", "r10",
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"{r11}", "r11",
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"{r12}", "r12",
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"{r13}", "r13",
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"{r14}", "r14",
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"{lr}", "lr",
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"{sp}", "sp",
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"{ip}", "ip",
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"{fp}", "fp",
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"{sl}", "sl",
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"{memory}", "memory",
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"{cc}", "cc",
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0,0
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};
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ARMDarwinTargetAsmInfo::ARMDarwinTargetAsmInfo() {
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ZeroDirective = "\t.space\t";
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ZeroFillDirective = "\t.zerofill\t"; // Uses .zerofill
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SetDirective = "\t.set\t";
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ProtectedDirective = NULL;
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HasDotTypeDotSizeDirective = false;
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SupportsDebugInformation = true;
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// Exceptions handling
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ExceptionsType = ExceptionHandling::SjLj;
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GlobalEHDirective = "\t.globl\t";
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SupportsWeakOmittedEHFrame = false;
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AbsoluteEHSectionOffsets = false;
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}
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ARMELFTargetAsmInfo::ARMELFTargetAsmInfo() {
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NeedsSet = false;
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HasLEB128 = true;
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AbsoluteDebugSectionOffsets = true;
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PrivateGlobalPrefix = ".L";
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WeakRefDirective = "\t.weak\t";
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SetDirective = "\t.set\t";
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DwarfRequiresFrameSection = false;
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SupportsDebugInformation = true;
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}
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// Instantiate default implementation.
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TEMPLATE_INSTANTIATION(class ARMTargetAsmInfo<DarwinTargetAsmInfo>);
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TEMPLATE_INSTANTIATION(class ARMTargetAsmInfo<TargetAsmInfo>);
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