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Apply twice the negative bias on transparent blocks when computing the compact regions. This excludes loop backedges from the region when only one of the loop blocks uses the register. Previously, we would include the backedge in the region if the loop preheader and the loop latch both used the register, but the loop header didn't. When both the header and latch blocks use the register, we still keep it live on the backedge. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136832 91177308-0d34-0410-b5e6-96231b3b80d8
157 lines
6.1 KiB
C++
157 lines
6.1 KiB
C++
//===-- SpillPlacement.h - Optimal Spill Code Placement --------*- C++ -*--===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This analysis computes the optimal spill code placement between basic blocks.
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//
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// The runOnMachineFunction() method only precomputes some profiling information
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// about the CFG. The real work is done by prepare(), addConstraints(), and
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// finish() which are called by the register allocator.
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//
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// Given a variable that is live across multiple basic blocks, and given
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// constraints on the basic blocks where the variable is live, determine which
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// edge bundles should have the variable in a register and which edge bundles
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// should have the variable in a stack slot.
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//
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// The returned bit vector can be used to place optimal spill code at basic
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// block entries and exits. Spill code placement inside a basic block is not
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// considered.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_SPILLPLACEMENT_H
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#define LLVM_CODEGEN_SPILLPLACEMENT_H
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#include "llvm/ADT/ArrayRef.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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namespace llvm {
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class BitVector;
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class EdgeBundles;
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class MachineBasicBlock;
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class MachineLoopInfo;
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class SpillPlacement : public MachineFunctionPass {
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struct Node;
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const MachineFunction *MF;
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const EdgeBundles *bundles;
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const MachineLoopInfo *loops;
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Node *nodes;
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// Nodes that are active in the current computation. Owned by the prepare()
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// caller.
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BitVector *ActiveNodes;
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// Nodes with active links. Populated by scanActiveBundles.
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SmallVector<unsigned, 8> Linked;
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// Nodes that went positive during the last call to scanActiveBundles or
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// iterate.
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SmallVector<unsigned, 8> RecentPositive;
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// Block frequencies are computed once. Indexed by block number.
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SmallVector<float, 4> BlockFrequency;
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public:
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static char ID; // Pass identification, replacement for typeid.
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SpillPlacement() : MachineFunctionPass(ID), nodes(0) {}
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~SpillPlacement() { releaseMemory(); }
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/// BorderConstraint - A basic block has separate constraints for entry and
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/// exit.
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enum BorderConstraint {
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DontCare, ///< Block doesn't care / variable not live.
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PrefReg, ///< Block entry/exit prefers a register.
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PrefSpill, ///< Block entry/exit prefers a stack slot.
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PrefBoth, ///< Block entry prefers both register and stack.
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MustSpill ///< A register is impossible, variable must be spilled.
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};
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/// BlockConstraint - Entry and exit constraints for a basic block.
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struct BlockConstraint {
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unsigned Number; ///< Basic block number (from MBB::getNumber()).
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BorderConstraint Entry : 8; ///< Constraint on block entry.
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BorderConstraint Exit : 8; ///< Constraint on block exit.
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/// True when this block changes the value of the live range. This means
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/// the block has a non-PHI def. When this is false, a live-in value on
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/// the stack can be live-out on the stack without inserting a spill.
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bool ChangesValue;
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};
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/// prepare - Reset state and prepare for a new spill placement computation.
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/// @param RegBundles Bit vector to receive the edge bundles where the
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/// variable should be kept in a register. Each bit
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/// corresponds to an edge bundle, a set bit means the
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/// variable should be kept in a register through the
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/// bundle. A clear bit means the variable should be
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/// spilled. This vector is retained.
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void prepare(BitVector &RegBundles);
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/// addConstraints - Add constraints and biases. This method may be called
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/// more than once to accumulate constraints.
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/// @param LiveBlocks Constraints for blocks that have the variable live in or
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/// live out.
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void addConstraints(ArrayRef<BlockConstraint> LiveBlocks);
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/// addPrefSpill - Add PrefSpill constraints to all blocks listed. This is
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/// equivalent to calling addConstraint with identical BlockConstraints with
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/// Entry = Exit = PrefSpill, and ChangesValue = false.
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///
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/// @param Blocks Array of block numbers that prefer to spill in and out.
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/// @param Strong When true, double the negative bias for these blocks.
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void addPrefSpill(ArrayRef<unsigned> Blocks, bool Strong);
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/// addLinks - Add transparent blocks with the given numbers.
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void addLinks(ArrayRef<unsigned> Links);
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/// scanActiveBundles - Perform an initial scan of all bundles activated by
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/// addConstraints and addLinks, updating their state. Add all the bundles
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/// that now prefer a register to RecentPositive.
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/// Prepare internal data structures for iterate.
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/// Return true is there are any positive nodes.
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bool scanActiveBundles();
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/// iterate - Update the network iteratively until convergence, or new bundles
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/// are found.
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void iterate();
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/// getRecentPositive - Return an array of bundles that became positive during
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/// the previous call to scanActiveBundles or iterate.
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ArrayRef<unsigned> getRecentPositive() { return RecentPositive; }
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/// finish - Compute the optimal spill code placement given the
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/// constraints. No MustSpill constraints will be violated, and the smallest
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/// possible number of PrefX constraints will be violated, weighted by
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/// expected execution frequencies.
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/// The selected bundles are returned in the bitvector passed to prepare().
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/// @return True if a perfect solution was found, allowing the variable to be
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/// in a register through all relevant bundles.
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bool finish();
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/// getBlockFrequency - Return the estimated block execution frequency per
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/// function invocation.
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float getBlockFrequency(unsigned Number) const {
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return BlockFrequency[Number];
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}
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private:
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virtual bool runOnMachineFunction(MachineFunction&);
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virtual void getAnalysisUsage(AnalysisUsage&) const;
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virtual void releaseMemory();
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void activate(unsigned);
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};
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} // end namespace llvm
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#endif
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