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30aea9d96ef8226749ff1eb73c2f3cb19668e077
llvm-6502/test/CodeGen
T
History
Bob Wilson 30aea9d96e Add codegen support for NEON vld2lane intrinsics with 128-bit vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83568 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08 18:56:10 +00:00
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Alpha
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ARM
Add codegen support for NEON vld2lane intrinsics with 128-bit vectors.
2009-10-08 18:56:10 +00:00
Blackfin
Coalescer should not delete extract_subreg, insert_subreg, and subreg_to_reg of
2009-09-28 05:28:43 +00:00
CBackend
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CellSPU
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CPP
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Generic
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Mips
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MSP430
Allow symbols to start from the digit if target requests it. This allows, e.g. pinning
2009-09-18 16:57:42 +00:00
PIC16
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PowerPC
Add nounwind to this test.
2009-09-24 20:20:08 +00:00
SPARC
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SystemZ
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Thumb
Forgot about ARM::tPUSH. It also has a new writeback operand.
2009-10-02 05:03:07 +00:00
Thumb2
Fix tests.
2009-10-02 06:53:57 +00:00
X86
Fix handling of x86 'R' constraint.
2009-10-07 22:47:20 +00:00
XCore
Add some peepholes for signed comparisons using ashr X, X, 32.
2009-10-08 15:38:17 +00:00
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