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https://github.com/c64scene-ar/llvm-6502.git
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102606 91177308-0d34-0410-b5e6-96231b3b80d8
145 lines
4.7 KiB
C++
145 lines
4.7 KiB
C++
//===-- FunctionLoweringInfo.h - Lower functions from LLVM IR to CodeGen --===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This implements routines for translating functions from LLVM IR into
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// Machine IR.
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//
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//===----------------------------------------------------------------------===//
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#ifndef FUNCTIONLOWERINGINFO_H
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#define FUNCTIONLOWERINGINFO_H
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#include "llvm/InlineAsm.h"
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#include "llvm/Instructions.h"
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#include "llvm/ADT/APInt.h"
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#include "llvm/ADT/DenseMap.h"
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#include "llvm/ADT/SmallVector.h"
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#ifndef NDEBUG
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#include "llvm/ADT/SmallSet.h"
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#endif
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#include "llvm/CodeGen/ValueTypes.h"
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#include "llvm/CodeGen/ISDOpcodes.h"
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#include "llvm/Support/CallSite.h"
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#include <vector>
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namespace llvm {
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class AllocaInst;
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class BasicBlock;
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class CallInst;
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class Function;
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class GlobalVariable;
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class Instruction;
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class MachineInstr;
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class MachineBasicBlock;
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class MachineFunction;
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class MachineModuleInfo;
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class MachineRegisterInfo;
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class TargetLowering;
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class Value;
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//===--------------------------------------------------------------------===//
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/// FunctionLoweringInfo - This contains information that is global to a
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/// function that is used when lowering a region of the function.
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///
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class FunctionLoweringInfo {
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public:
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const TargetLowering &TLI;
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const Function *Fn;
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MachineFunction *MF;
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MachineRegisterInfo *RegInfo;
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/// CanLowerReturn - true iff the function's return value can be lowered to
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/// registers.
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bool CanLowerReturn;
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/// DemoteRegister - if CanLowerReturn is false, DemoteRegister is a vreg
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/// allocated to hold a pointer to the hidden sret parameter.
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unsigned DemoteRegister;
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/// MBBMap - A mapping from LLVM basic blocks to their machine code entry.
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DenseMap<const BasicBlock*, MachineBasicBlock *> MBBMap;
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/// ValueMap - Since we emit code for the function a basic block at a time,
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/// we must remember which virtual registers hold the values for
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/// cross-basic-block values.
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DenseMap<const Value*, unsigned> ValueMap;
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/// StaticAllocaMap - Keep track of frame indices for fixed sized allocas in
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/// the entry block. This allows the allocas to be efficiently referenced
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/// anywhere in the function.
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DenseMap<const AllocaInst*, int> StaticAllocaMap;
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/// ArgDbgValues - A list of DBG_VALUE instructions created during isel for
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/// function arguments that are inserted after scheduling is completed.
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SmallVector<MachineInstr*, 8> ArgDbgValues;
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#ifndef NDEBUG
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SmallSet<const Instruction *, 8> CatchInfoLost;
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SmallSet<const Instruction *, 8> CatchInfoFound;
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#endif
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struct LiveOutInfo {
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unsigned NumSignBits;
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APInt KnownOne, KnownZero;
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LiveOutInfo() : NumSignBits(0), KnownOne(1, 0), KnownZero(1, 0) {}
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};
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/// LiveOutRegInfo - Information about live out vregs, indexed by their
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/// register number offset by 'FirstVirtualRegister'.
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std::vector<LiveOutInfo> LiveOutRegInfo;
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/// PHINodesToUpdate - A list of phi instructions whose operand list will
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/// be updated after processing the current basic block.
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/// TODO: This isn't per-function state, it's per-basic-block state. But
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/// there's no other convenient place for it to live right now.
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std::vector<std::pair<MachineInstr*, unsigned> > PHINodesToUpdate;
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explicit FunctionLoweringInfo(const TargetLowering &TLI);
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/// set - Initialize this FunctionLoweringInfo with the given Function
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/// and its associated MachineFunction.
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///
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void set(const Function &Fn, MachineFunction &MF, bool EnableFastISel);
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/// clear - Clear out all the function-specific state. This returns this
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/// FunctionLoweringInfo to an empty state, ready to be used for a
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/// different function.
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void clear();
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unsigned MakeReg(EVT VT);
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/// isExportedInst - Return true if the specified value is an instruction
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/// exported from its block.
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bool isExportedInst(const Value *V) {
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return ValueMap.count(V);
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}
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unsigned CreateRegForValue(const Value *V);
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unsigned InitializeRegForValue(const Value *V) {
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unsigned &R = ValueMap[V];
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assert(R == 0 && "Already initialized this value register!");
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return R = CreateRegForValue(V);
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}
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};
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/// AddCatchInfo - Extract the personality and type infos from an eh.selector
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/// call, and add them to the specified machine basic block.
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void AddCatchInfo(const CallInst &I,
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MachineModuleInfo *MMI, MachineBasicBlock *MBB);
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/// CopyCatchInfo - Copy catch information from DestBB to SrcBB.
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void CopyCatchInfo(const BasicBlock *SrcBB, const BasicBlock *DestBB,
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MachineModuleInfo *MMI, FunctionLoweringInfo &FLI);
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} // end namespace llvm
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#endif
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