Jim Grosbach 3148a65490 ARM parsing and encoding for LDRBT instruction. ... Fix the instruction representation to correctly only allow post-indexed form. Add tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137074 91177308-0d34-0410-b5e6-96231b3b80d8		2011-08-08 23:28:47 +00:00
..
Analysis	Made SCEV's UDiv expressions more canonical. When dividing a	2011-08-06 07:00:37 +00:00
Archive	Rewrite the CMake build to use explicit dependencies between libraries,	2011-07-29 00:14:25 +00:00
AsmParser	Remove unused variables.	2011-08-03 19:53:48 +00:00
Bitcode	Add the 'resume' instruction for the new EH rewrite.	2011-07-31 06:30:59 +00:00
CodeGen	Hoist hasLoadFromStackSlot and hasStoreToStackSlot.	2011-08-08 20:53:24 +00:00
CompilerDriver
ExecutionEngine	Rewrite the CMake build to use explicit dependencies between libraries,	2011-07-29 00:14:25 +00:00
Linker	Linke NamedMDNodes after linking global values as comment suggests.	2011-08-04 19:44:28 +00:00
MC	Pacify virtual dtor warnings and cmake buildbots.	2011-08-08 19:09:02 +00:00
Object	Rewrite the CMake build to use explicit dependencies between libraries,	2011-07-29 00:14:25 +00:00
Support	Added several architecture names.	2011-07-30 01:29:54 +00:00
Target	ARM parsing and encoding for LDRBT instruction.	2011-08-08 23:28:47 +00:00
Transforms	Made SCEV's UDiv expressions more canonical. When dividing a	2011-08-06 07:00:37 +00:00
VMCore	Indicate that there are changes if runOfFunction returns saying that there are.	2011-08-08 23:01:10 +00:00
CMakeLists.txt
Makefile