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llvm-6502/lib/Target/AMDGPU
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Simon Pilgrim c365e7e2b5 Remove TargetInstrInfo::canFoldMemoryOperand 
canFoldMemoryOperand is not actually used anywhere in the codebase - all existing users instead call foldMemoryOperand directly when they wish to fold and can correctly deduce what they need from the return value. 

This patch removes the canFoldMemoryOperand base function and the target implementations; only x86 had a real (bit-rotted) implementation, although AMDGPU had a preparatory stub that had never needed to be completed.

Differential Revision: http://reviews.llvm.org/D11331

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242638 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-19 10:50:53 +00:00
..
AsmParser Reverting r241058 because it's causing buildbot failures. 2015-06-30 12:32:53 +00:00
InstPrinter
MCTargetDesc MC: Remove MCSubtargetInfo() default constructor 2015-07-10 22:43:42 +00:00
TargetInfo
Utils AMDGPU/SI: Update amd_kernel_code_t definition and add assembler support 2015-06-26 21:58:31 +00:00
AMDGPU.h
AMDGPU.td AMDPGU/SI: Use AssertZext node to mask high bit for scratch offsets 2015-07-16 19:40:07 +00:00
AMDGPUAlwaysInlinePass.cpp AMDGPU: Minor cleanups to always inline pass 2015-07-13 19:08:36 +00:00
AMDGPUAsmPrinter.cpp AMDGPU/SI: Update amd_kernel_code_t definition and add assembler support 2015-06-26 21:58:31 +00:00
AMDGPUAsmPrinter.h AMDGPU/SI: Emit amd_kernel_code_t in EmitFunctionBodyStart() 2015-06-26 21:14:58 +00:00
AMDGPUCallingConv.td
AMDGPUFrameLowering.cpp
AMDGPUFrameLowering.h
AMDGPUInstrInfo.cpp Remove TargetInstrInfo::canFoldMemoryOperand 2015-07-19 10:50:53 +00:00
AMDGPUInstrInfo.h Remove TargetInstrInfo::canFoldMemoryOperand 2015-07-19 10:50:53 +00:00
AMDGPUInstrInfo.td
AMDGPUInstructions.td
AMDGPUIntrinsicInfo.cpp
AMDGPUIntrinsicInfo.h
AMDGPUIntrinsics.td
AMDGPUISelDAGToDAG.cpp AMDPGU/SI: Negative offsets aren't allowed in MUBUF's vaddr operand 2015-07-16 19:40:09 +00:00
AMDGPUISelLowering.cpp AMDGPU: Avoid using 64-bit shift for i64 (shl x, 32) 2015-07-14 18:20:33 +00:00
AMDGPUISelLowering.h AMDGPU: Avoid using 64-bit shift for i64 (shl x, 32) 2015-07-14 18:20:33 +00:00
AMDGPUMachineFunction.cpp
AMDGPUMachineFunction.h Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
AMDGPUMCInstLower.cpp
AMDGPUMCInstLower.h
AMDGPUPromoteAlloca.cpp
AMDGPURegisterInfo.cpp
AMDGPURegisterInfo.h
AMDGPURegisterInfo.td
AMDGPUSubtarget.cpp AMDPGU/SI: Use AssertZext node to mask high bit for scratch offsets 2015-07-16 19:40:07 +00:00
AMDGPUSubtarget.h AMDPGU/SI: Use AssertZext node to mask high bit for scratch offsets 2015-07-16 19:40:07 +00:00
AMDGPUTargetMachine.cpp AMDGPU/SI: Fix read2 merging into a super register. 2015-07-14 17:57:36 +00:00
AMDGPUTargetMachine.h
AMDGPUTargetTransformInfo.cpp
AMDGPUTargetTransformInfo.h Make TargetTransformInfo keeping a reference to the Module DataLayout 2015-07-09 02:08:42 +00:00
AMDILCFGStructurizer.cpp AMDGPU/R600: Remove unused variable 2015-07-16 16:13:34 +00:00
AMDKernelCodeT.h AMDGPU/SI: Update amd_kernel_code_t definition and add assembler support 2015-06-26 21:58:31 +00:00
CaymanInstructions.td
CIInstructions.td
CMakeLists.txt AMDGPU/SI: Add hsa code object directives 2015-06-26 21:15:07 +00:00
EvergreenInstructions.td
LLVMBuild.txt AMDGPU/SI: Add hsa code object directives 2015-06-26 21:15:07 +00:00
Makefile AMDGPU/SI: Add hsa code object directives 2015-06-26 21:15:07 +00:00
Processors.td AMDGPU/SI: Add hsa code object directives 2015-06-26 21:15:07 +00:00
R600ClauseMergePass.cpp
R600ControlFlowFinalizer.cpp
R600Defines.h Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
R600EmitClauseMarkers.cpp
R600ExpandSpecialInstrs.cpp
R600InstrFormats.td
R600InstrInfo.cpp Replace copy-pasted debug value skipping with MBB::getLastNonDebugInstr 2015-06-25 13:28:24 +00:00
R600InstrInfo.h Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
R600Instructions.td
R600Intrinsics.td
R600ISelLowering.cpp Add missing break in switch case in R600ISelLowering 2015-07-16 06:23:12 +00:00
R600ISelLowering.h Make TargetLowering::getPointerTy() taking DataLayout as an argument 2015-07-09 02:09:04 +00:00
R600MachineFunctionInfo.cpp
R600MachineFunctionInfo.h Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
R600MachineScheduler.cpp
R600MachineScheduler.h
R600OptimizeVectorRegisters.cpp Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
R600Packetizer.cpp
R600RegisterInfo.cpp
R600RegisterInfo.h
R600RegisterInfo.td
R600Schedule.td
R600TextureIntrinsicsReplacer.cpp Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
R700Instructions.td
SIAnnotateControlFlow.cpp
SIDefines.h AMDGPU/SI: Update amd_kernel_code_t definition and add assembler support 2015-06-26 21:58:31 +00:00
SIFixControlFlowLiveIntervals.cpp
SIFixSGPRCopies.cpp
SIFixSGPRLiveRanges.cpp
SIFoldOperands.cpp AMDGPU/SI: Select mad patterns to v_mac_f32 2015-07-13 15:47:57 +00:00
SIInsertWaits.cpp
SIInstrFormats.td
SIInstrInfo.cpp AMDGPU/SI: Fix read2 merging into a super register. 2015-07-14 17:57:36 +00:00
SIInstrInfo.h AMDGPU/SI: Select mad patterns to v_mac_f32 2015-07-13 15:47:57 +00:00
SIInstrInfo.td AMDGPU/SI: Select mad patterns to v_mac_f32 2015-07-13 15:47:57 +00:00
SIInstructions.td AMDGPU/SI: Select mad patterns to v_mac_f32 2015-07-13 15:47:57 +00:00
SIIntrinsics.td
SIISelLowering.cpp AMDPGU/SI: Use AssertZext node to mask high bit for scratch offsets 2015-07-16 19:40:07 +00:00
SIISelLowering.h Re-instate the EVT parameter to getScalarShiftAmountTy() for OOT user 2015-07-09 15:12:23 +00:00
SILoadStoreOptimizer.cpp AMDGPU/SI: Fix read2 merging into a super register. 2015-07-14 17:57:36 +00:00
SILowerControlFlow.cpp
SILowerI1Copies.cpp
SIMachineFunctionInfo.cpp MachineRegisterInfo: Remove UsedPhysReg infrastructure 2015-07-14 17:52:07 +00:00
SIMachineFunctionInfo.h
SIPrepareScratchRegs.cpp MachineRegisterInfo: Remove UsedPhysReg infrastructure 2015-07-14 17:52:07 +00:00
SIRegisterInfo.cpp MachineRegisterInfo: Remove UsedPhysReg infrastructure 2015-07-14 17:52:07 +00:00
SIRegisterInfo.h
SIRegisterInfo.td
SISchedule.td
SIShrinkInstructions.cpp AMDGPU/SI: Add support for shrinking v_cndmask_b32_e32 instructions 2015-07-14 14:15:03 +00:00
SITypeRewriter.cpp
VIInstrFormats.td
VIInstructions.td