llvm-6502/lib/Target/AArch64
David Blaikie 317ccafdbd Revert "Remove the explicit SDNodeIterator::operator= in favor of the implicit default"
Accidentally committed a few more of these cleanup changes than
intended. Still breaking these out & tidying them up.

This reverts commit r231135.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231136 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-03 21:18:16 +00:00
..
AsmParser
Disassembler
InstPrinter
MCTargetDesc Learn that __DATA,__objc_classrefs is not atomized via symbols. 2015-02-12 23:11:59 +00:00
TargetInfo
Utils Reverting r229831 due to multiple ARM/PPC/MIPS build-bot failures. 2015-02-19 11:38:11 +00:00
AArch64.h
AArch64.td
AArch64A53Fix835769.cpp
AArch64A57FPLoadBalancing.cpp Rewrite MachineOperand::print and MachineInstr::print to avoid 2015-02-27 00:11:34 +00:00
AArch64AddressTypePromotion.cpp
AArch64AdvSIMDScalarPass.cpp
AArch64AsmPrinter.cpp
AArch64BranchRelaxation.cpp
AArch64CallingConvention.h
AArch64CallingConvention.td
AArch64CleanupLocalDynamicTLSPass.cpp
AArch64CollectLOH.cpp
AArch64ConditionalCompares.cpp AArch64: Canonicalize access to function attributes, NFC 2015-02-14 02:09:06 +00:00
AArch64ConditionOptimizer.cpp
AArch64DeadRegisterDefinitionsPass.cpp
AArch64ExpandPseudoInsts.cpp MathExtras: Bring Count(Trailing|Leading)Ones and CountPopulation in line with countTrailingZeros 2015-02-12 15:35:40 +00:00
AArch64FastISel.cpp
AArch64FrameLowering.cpp AArch64: Canonicalize access to function attributes, NFC 2015-02-14 02:09:06 +00:00
AArch64FrameLowering.h
AArch64InstrAtomics.td
AArch64InstrFormats.td
AArch64InstrInfo.cpp ArrayRefize memory operand folding. NFC. 2015-02-28 12:04:00 +00:00
AArch64InstrInfo.h ArrayRefize memory operand folding. NFC. 2015-02-28 12:04:00 +00:00
AArch64InstrInfo.td
AArch64ISelDAGToDAG.cpp AArch64: Add debug message for large shift constants. 2015-02-25 18:03:50 +00:00
AArch64ISelLowering.cpp [AArch64] When combining constant mul of -3, prefer (sub x, (shl x, N)). 2015-03-03 17:31:01 +00:00
AArch64ISelLowering.h getRegForInlineAsmConstraint wants to use TargetRegisterInfo for 2015-02-26 22:38:43 +00:00
AArch64LoadStoreOptimizer.cpp
AArch64MachineCombinerPattern.h
AArch64MachineFunctionInfo.h
AArch64MCInstLower.cpp
AArch64MCInstLower.h
AArch64PBQPRegAlloc.cpp Revert "Remove the explicit SDNodeIterator::operator= in favor of the implicit default" 2015-03-03 21:18:16 +00:00
AArch64PBQPRegAlloc.h
AArch64PerfectShuffle.h
AArch64PromoteConstant.cpp [AArch64] fix an invalid-iterator-use bug. 2015-03-02 00:17:18 +00:00
AArch64RegisterInfo.cpp
AArch64RegisterInfo.h
AArch64RegisterInfo.td
AArch64SchedA53.td
AArch64SchedA57.td
AArch64SchedA57WriteRes.td
AArch64SchedCyclone.td
AArch64Schedule.td
AArch64SelectionDAGInfo.cpp Get the cached subtarget off the MachineFunction rather than 2015-02-20 08:39:06 +00:00
AArch64SelectionDAGInfo.h
AArch64StorePairSuppress.cpp
AArch64Subtarget.cpp
AArch64Subtarget.h
AArch64TargetMachine.cpp Rewrite the global merge pass to be subprogram agnostic for now. 2015-02-23 19:28:45 +00:00
AArch64TargetMachine.h
AArch64TargetObjectFile.cpp
AArch64TargetObjectFile.h
AArch64TargetTransformInfo.cpp Make some non-constant static variables non-static or fully const. 2015-03-01 18:09:56 +00:00
AArch64TargetTransformInfo.h
CMakeLists.txt
LLVMBuild.txt
Makefile