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with syntax. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74679 91177308-0d34-0410-b5e6-96231b3b80d8
225 lines
6.5 KiB
C++
225 lines
6.5 KiB
C++
//===- MC-X86Specific.cpp - X86-Specific code for MC ----------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements X86-specific parsing, encoding and decoding stuff for
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// MC.
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//
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//===----------------------------------------------------------------------===//
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#include "AsmParser.h"
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#include "llvm/MC/MCInst.h"
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using namespace llvm;
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/// X86Operand - Instances of this class represent one X86 machine instruction.
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struct AsmParser::X86Operand {
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enum {
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Register,
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Immediate,
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Memory
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} Kind;
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union {
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struct {
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unsigned RegNo;
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} Reg;
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struct {
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MCValue Val;
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} Imm;
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struct {
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unsigned SegReg;
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MCValue Disp;
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unsigned BaseReg;
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unsigned IndexReg;
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unsigned Scale;
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} Mem;
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};
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static X86Operand CreateReg(unsigned RegNo) {
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X86Operand Res;
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Res.Kind = Register;
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Res.Reg.RegNo = RegNo;
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return Res;
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}
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static X86Operand CreateImm(MCValue Val) {
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X86Operand Res;
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Res.Kind = Immediate;
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Res.Imm.Val = Val;
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return Res;
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}
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static X86Operand CreateMem(unsigned SegReg, MCValue Disp, unsigned BaseReg,
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unsigned IndexReg, unsigned Scale) {
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X86Operand Res;
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Res.Kind = Memory;
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Res.Mem.SegReg = SegReg;
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Res.Mem.Disp = Disp;
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Res.Mem.BaseReg = BaseReg;
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Res.Mem.IndexReg = IndexReg;
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Res.Mem.Scale = Scale;
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return Res;
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}
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};
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bool AsmParser::ParseX86Operand(X86Operand &Op) {
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switch (Lexer.getKind()) {
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default:
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return ParseX86MemOperand(Op);
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case asmtok::Register:
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// FIXME: Decode reg #.
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// FIXME: if a segment register, this could either be just the seg reg, or
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// the start of a memory operand.
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Op = X86Operand::CreateReg(123);
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Lexer.Lex(); // Eat register.
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return false;
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case asmtok::Dollar: {
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// $42 -> immediate.
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Lexer.Lex();
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MCValue Val;
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if (ParseRelocatableExpression(Val))
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return true;
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Op = X86Operand::CreateImm(Val);
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return false;
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}
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case asmtok::Star: {
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Lexer.Lex(); // Eat the star.
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if (Lexer.is(asmtok::Register)) {
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Op = X86Operand::CreateReg(123);
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Lexer.Lex(); // Eat register.
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} else if (ParseX86MemOperand(Op))
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return true;
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// FIXME: Note that these are 'dereferenced' so that clients know the '*' is
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// there.
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return false;
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}
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}
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}
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/// ParseX86MemOperand: segment: disp(basereg, indexreg, scale)
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bool AsmParser::ParseX86MemOperand(X86Operand &Op) {
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// FIXME: If SegReg ':' (e.g. %gs:), eat and remember.
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unsigned SegReg = 0;
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// We have to disambiguate a parenthesized expression "(4+5)" from the start
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// of a memory operand with a missing displacement "(%ebx)" or "(,%eax)". The
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// only way to do this without lookahead is to eat the ( and see what is after
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// it.
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MCValue Disp = MCValue::get(0, 0, 0);
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if (Lexer.isNot(asmtok::LParen)) {
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if (ParseRelocatableExpression(Disp)) return true;
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// After parsing the base expression we could either have a parenthesized
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// memory address or not. If not, return now. If so, eat the (.
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if (Lexer.isNot(asmtok::LParen)) {
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Op = X86Operand::CreateMem(SegReg, Disp, 0, 0, 0);
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return false;
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}
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// Eat the '('.
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Lexer.Lex();
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} else {
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// Okay, we have a '('. We don't know if this is an expression or not, but
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// so we have to eat the ( to see beyond it.
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Lexer.Lex(); // Eat the '('.
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if (Lexer.is(asmtok::Register) || Lexer.is(asmtok::Comma)) {
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// Nothing to do here, fall into the code below with the '(' part of the
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// memory operand consumed.
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} else {
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// It must be an parenthesized expression, parse it now.
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if (ParseRelocatableExpression(Disp))
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return true;
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// After parsing the base expression we could either have a parenthesized
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// memory address or not. If not, return now. If so, eat the (.
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if (Lexer.isNot(asmtok::LParen)) {
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Op = X86Operand::CreateMem(SegReg, Disp, 0, 0, 0);
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return false;
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}
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// Eat the '('.
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Lexer.Lex();
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}
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}
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// If we reached here, then we just ate the ( of the memory operand. Process
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// the rest of the memory operand.
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unsigned BaseReg = 0, IndexReg = 0, Scale = 0;
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if (Lexer.is(asmtok::Register)) {
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BaseReg = 123; // FIXME: decode reg #
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Lexer.Lex(); // eat the register.
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}
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if (Lexer.is(asmtok::Comma)) {
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Lexer.Lex(); // eat the comma.
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if (Lexer.is(asmtok::Register)) {
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IndexReg = 123; // FIXME: decode reg #
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Lexer.Lex(); // eat the register.
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Scale = 1; // If not specified, the scale defaults to 1.
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}
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if (Lexer.is(asmtok::Comma)) {
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Lexer.Lex(); // eat the comma.
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// If present, get and validate scale amount.
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if (Lexer.is(asmtok::IntVal)) {
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int64_t ScaleVal = Lexer.getCurIntVal();
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if (ScaleVal != 1 && ScaleVal != 2 && ScaleVal != 4 && ScaleVal != 8)
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return TokError("scale factor in address must be 1, 2, 4 or 8");
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Lexer.Lex(); // eat the scale.
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Scale = (unsigned)ScaleVal;
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}
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}
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}
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// Ok, we've eaten the memory operand, verify we have a ')' and eat it too.
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if (Lexer.isNot(asmtok::RParen))
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return TokError("unexpected token in memory operand");
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Lexer.Lex(); // Eat the ')'.
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Op = X86Operand::CreateMem(SegReg, Disp, BaseReg, IndexReg, Scale);
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return false;
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}
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/// MatchX86Inst - Convert a parsed instruction name and operand list into a
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/// concrete instruction.
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static bool MatchX86Inst(const char *Name,
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llvm::SmallVector<AsmParser::X86Operand, 3> &Operands,
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MCInst &Inst) {
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return false;
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}
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/// ParseX86InstOperands - Parse the operands of an X86 instruction and return
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/// them as the operands of an MCInst.
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bool AsmParser::ParseX86InstOperands(const char *InstName, MCInst &Inst) {
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llvm::SmallVector<X86Operand, 3> Operands;
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if (Lexer.isNot(asmtok::EndOfStatement)) {
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// Read the first operand.
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Operands.push_back(X86Operand());
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if (ParseX86Operand(Operands.back()))
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return true;
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while (Lexer.is(asmtok::Comma)) {
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Lexer.Lex(); // Eat the comma.
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// Parse and remember the operand.
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Operands.push_back(X86Operand());
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if (ParseX86Operand(Operands.back()))
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return true;
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}
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}
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return MatchX86Inst(InstName, Operands, Inst);
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}
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